參數(shù)資料
型號(hào): HY64LD16162M-DF85C
英文描述: PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC
中文描述: 偽靜態(tài)內(nèi)存| 1MX16 |的CMOS | BGA封裝| 48PIN |塑料
文件頁(yè)數(shù): 5/11頁(yè)
文件大?。?/td> 348K
代理商: HY64LD16162M-DF85C
HY64LD16162M Series
5
Revision 1.7
March. 2002
AC TEST CONDITIONS
T
A =
-25
°
C to 85
°
C(E) / -40
°
C to 85
°
C(I), unless otherwise specified
Parameter
Input Pulse Level
Input Rising and Fall Time
Input and Output Timing Reference Level
Output Load
Value
0.4V to 2.2V
5ns
1.1V
See Below
AC TEST LOADS
Note
1. Including jig and scope capacitance.
AC CHARACTERISTICS
Vdd=2.3V~2.7V, T
A =
-25
°
C to 85
°
C(E) / -40
°
C to 85
°
C(I), unless otherwise specified
#
Parameter
Min.
1
2
3
4
5
6
7
8
9
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
/LB, /UB Access Time
Chip Select to Output in Low Z
Output Enable to Output in Low Z
/LB, /UB Enable to Output in Low Z
Chip Disable to Output in High Z
Out Disable to Output in High Z
/LB, /UB Disable to Output in High Z
Output Hold from Address Change
85
-
-
-
-
10
5
10
0
0
0
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Max.
-
Symbol
tRC
tAA
tACS
tOE
tBA
tCLZ
tOLZ
tBLZ
tCHZ
tOHZ
tBHZ
tOH
Read Cycle
85
85
20
85
-
-
-
30
30
30
-
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Write Cycle Time
Chip Selection to End of Write
Address Valid to End of Write
/LB, /UB Valid to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
85
70
70
70
0
60
0
0
30
0
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
-
-
-
-
tWC
tCW
tAW
tBW
tAS
tWP
tWR
tWHZ
tDW
tDH
tOW
Write Cycle
30
-
-
-
-85
C
L
1
=30 pF
D
OUT
R
L
=50 Ohm
V
L
=1.1 V
Z
0
=50 Ohm
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