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參數(shù)資料
| 型號： | HY62U8200LLST-I-10 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | SRAM |
| 英文描述： | 256K X 8 STANDARD SRAM, 100 ns, PDSO32 |
| 封裝： | 8 X 13.40 MM, STSOP1-32 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 150K |
| 代理商： | HY62U8200LLST-I-10 |
HY62U8200 Series
Rev.09 / Jun. 2000
4
AC CHARACTERISTICS
Vcc= 2.7V~3.3V, T
A
= 0
°
C to 70
°
C/ -25
°
C to 85
°
C(E)/ -40
°
C to 85
°
C(I), unless otherwise specified
#
Parameter
-70
-85
-10
Min.
Max.
Min.
Max.
Min.
Max.
1
2
3
4
5
6
7
8
9
tRC
tAA
tACS
tOE
tCLZ
tOLZ
tCHZ
tOHZ
tOH
WRITE CYCLE
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Deselection to Output in High Z
Out Disable to Output in High Z
Output Hold from Address Change
70
-
-
-
10
5
0
0
15
-
85
-
-
-
10
5
0
0
15
-
100
-
-
-
10
5
0
0
15
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
70
70
40
-
-
20
20
-
85
85
45
-
-
25
25
-
100
100
50
-
-
30
30
-
10
11
12
13
14
15
16
17
18
19
tWC
tCW
tAW
tAS
tWP
tWR
tWHZ
tDW
tDH
tOW
Write Cycle Time
Chip Selection to End of Write
Address Valid to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
70
60
60
0
50
0
0
35
0
5
-
-
-
-
-
-
85
70
70
0
60
0
0
35
0
5
-
-
-
-
-
-
100
80
80
0
70
0
0
40
0
5
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
20
-
-
-
25
-
-
-
30
-
-
-
AC TEST CONDITIONS
T
A
= 0
°
C to 70
°
C / -25
°
C to 85
°
C (E)/ -40
°
C to 85
°
C (I), unless otherwise specified
Parameter
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Level
Output Load
Value
0.4V to 2.2V
5ns
1.5V
CL = 100pF + 1TTL Load
CL* = 30pF + 1TTL Load
Note
* : Test load is 30pF for 70ns device.
AC TEST LOADS
CL(1)
TTL
Note : 1 Including jig and scope capacitance
READ CYCLE
Symbol
Unit
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