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參數(shù)資料
| 型號： | HY62256BR1-10 |
| 英文描述： | x8 SRAM |
| 中文描述： | x8的SRAM |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 144K |
| 代理商： | HY62256BR1-10 |
HY62256A Series
Rev.02 /Jun.99
5
Note(READ CYCLE):
1. tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not
referenced to output voltage levels.
2. At any given temperature and voltage condition, tCHZ max. is less than tCLZ min. both for a given device
and from device to device.
3. /WE is high for the read cycle.
READ CYCLE 2
tRC
tAA
Data Valid
Previous Data
tOH
ADDR
Data
Out
Note(READ CYCLE):
1. /WE is high for the read cycle.
2. Device is continuously selected /CS= VIL.
3. /OE =VIL.
WRITE CYCLE 1(/OE Clocked)
ADDR
OE
CS
Data
Out
tWC
tDW
tOHZ
WE
Data Valid
tDH
tWP
tAS
Data In
tWR
tCW
tAW
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HY62256BR1-55 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| HY62256BR1-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| HY62256BR1-85 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| HY62256BT1-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| HY62256BT1-55 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
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