參數(shù)資料
型號(hào): HY62256ALLP
廠商: Hynix Semiconductor Inc.
英文描述: JT 22C 22#22D SKT RECP
中文描述: 32Kx8bit CMOS SRAM的
文件頁(yè)數(shù): 10/14頁(yè)
文件大?。?/td> 820K
代理商: HY62256ALLP
WRITE CYCLE 2 (/OE Low Fixed)
Notes (WRlTE CYCLE):
1. A write occurs during the overlap of a low /CS and a low /WE. A write begins at
the latest transition among /CS going low and /WE going low: A write ends at
the earliest transition among /CS going high and /WE going high. t
WP
is
measured from the beginning of write to the end of write.
2. tcw is measured from the later of /CS going low to the end of write .
3. t
AS
is measured from the address valid to the beginning of write.
4. t
WR
is measured from the end of write to the address change. t
WR
is applied in
case a write ends as /CS, or /WE going high.
5. If /OE and /WE are in the read mode during this period, and the I/O pins are in
the output low-Z state, input of opposite phase of the output must not be applied
because bus contention can occur.
6. If /CS goes low simultaneously with /WE going low, or after /WE going low,
the outputs remain in high impedance state.
7. D
OUT
is the same phase of latest written data in this write cycle.
8. D
OUT
is the read data of the new address.
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22/10/97 12:35
-sram/62256alt1
http://www.hea.com/hean2/sram/62256alt1.htm
相關(guān)PDF資料
PDF描述
HY62256ALLR1 Circular Connector; No. of Contacts:22; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:12; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle RoHS Compliant: No
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HY62256ALLP-10 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x8 SRAM
HY62256ALLP-12 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x8 SRAM
HY62256ALLP-55 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x8 SRAM
HY62256ALLP-70 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x8 SRAM
HY62256ALLP-85 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x8 SRAM