參數(shù)資料
型號(hào)： HY5S6B6DSFP-SE
廠商： HYNIX SEMICONDUCTOR INC
元件分類： DRAM
英文描述： 4Banks x1M x 16bits Synchronous DRAM
中文描述： 4M X 16 SYNCHRONOUS DRAM, 7 ns, PBGA54
封裝： 0.80 MM PITCH, LEAD FREE, FBGA-54
文件頁(yè)數(shù)： 14/27頁(yè)
文件大?。?/td> 368K
代理商： HY5S6B6DSFP-SE
Rev 0.3 / July 2004
14
HY5S6B6D(L/S)F(P)-xE
4Banks x 1M x 16bits Synchronous DRAM
CURRENT STATE TRUTH TABLE
(Sheet 3 of 4)
Current
State
Command
Action
Notes
CS RAS CAS WE
BA0/
BA1
A11-A0
Description
Precharging
L
L
L
L
OP CODE
Mode Register Set
ILLEGAL
13,14
L
L
L
H
X
X
Auto or Self Refresh ILLEGAL
13
L
L
H
L
BA
X
Precharge
No Operation:
Bank(s) idle after t
RP
L
L
H
H
BA
Row Add.
Bank Activate
ILLEGAL
4,12
L
H
L
L
BA
Col Add. A10
Write/WriteAP
ILLEGAL
4,12
L
H
L
H
BA
Col Add. A10
Read/ReadAP
ILLEGAL
4,12
L
H
H
H
X
X
No Operation
No Operation:
Bank(s) idle after t
RP
H
X
X
X
X
X
Device Deselect
No Operation:
Bank(s) idle after t
RP
Row
Activating
L
L
L
L
OP CODE
Mode Register Set
ILLEGAL
13,14
L
L
L
H
X
X
Auto or Self Refresh ILLEGAL
13
L
L
H
L
BA
X
Precharge
ILLEGAL
4,12
L
L
H
H
BA
Row Add.
Bank Activate
ILLEGAL
4,11,1
2
L
H
L
L
BA
Col Add. A10
Write/WriteAP
ILLEGAL
4,12
L
H
L
H
BA
Col Add. A10
Read/ReadAP
ILLEGAL
4,12
L
H
H
H
X
X
No Operation
No Operation: Row
Active after t
RCD
H
X
X
X
X
X
Device Deselect
No Operation: Row
Active after t
RCD
Write
Recovering
L
L
L
L
OP CODE
Mode Register Set
ILLEGAL
13,14
L
L
L
H
X
X
Auto or Self Refresh ILLEGAL
13
L
L
H
L
BA
X
Precharge
ILLEGAL
4,13
L
L
H
H
BA
Row Add.
Bank Activate
ILLEGAL
4,12
L
H
L
L
BA
Col Add. A10
Write/WriteAP
Start Write:
Optional AP(A10=H)
L
H
L
H
BA
Col Add. A10
Read/ReadAP
Start Read: Optional
AP(A10=H)
9
L
H
H
H
X
X
No Operation
No Operation:
Row Active after t
DPL
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