參數(shù)資料
型號(hào): HY5PS1G431F-Y5
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 1Gb DDR2 SDRAM
中文描述: 256M X 4 DDR DRAM, 0.45 ns, PBGA68
封裝: FBGA-68
文件頁(yè)數(shù): 32/33頁(yè)
文件大小: 540K
代理商: HY5PS1G431F-Y5
Rev. 1.2 / Dec 2006
32
1
HY5PS1G431(L)F
1
HY5PS1G831(L)F
ure shows a method to calculate these points when the device is no longer driving (tRPST), or begins driv-
ing (tRPRE) by measuring the signal at two different voltages. The actual voltage measurement points are
not critical as long as the calculation is consistent.
20. Input waveform timing with differential data strobe enabled MR[bit10] =0, is referenced from the input
signal crossing at the V
IH
(ac) level to the differential data strobe crosspoint for a rising signal, and from the
input signal crossing at the V
IL
(ac) level to the differential data strobe crosspoint for a falling signal applied
to the device under test.
21. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input
signal crossing at the V
IH
(dc) level to the differential data strobe crosspoint for a rising signal and V
IL
(dc) to
the differential data strobe crosspoint for a falling signal applied to the device under test.
22. Input waveform timing is referenced from the input signal crossing at the V
IH
(ac) level for a rising signal
and V
IL
(ac) for a falling signal applied to the device under test.
23. Input waveform timing is referenced from the input signal crossing at the V
IL
(dc) level for a rising signal
and V
IH
(dc) for a falling signal applied to the device under test.
tHZ , tRPST end point = 2*T1-T2
tLZ , tRPRE begin point = 2*T1-T2
VOH + xmV
VOH + 2xmV
VOL + 1xmV
VOL + 2xmV
tHZ
tRPST end point
VTT + 2xmV
VTT + xmV
VTT -xmV
VTT - 2xmV
tHZ
tRPRE begin point
DQS
V
DDQ
V
IH(ac)
min
V
IH(dc)
min
tDH
tDS
DQS
V
REF
(dc)
V
IL(dc)
max
V
SS
V
IL(ac)
max
tDH
tDS
Differential Input waveform timing
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