參數(shù)資料
型號(hào): HY5DS283222BF-28
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 128M(4Mx32) GDDR SDRAM
中文描述: 4M X 32 DDR DRAM, 0.6 ns, PBGA144
封裝: 12 X 12 MM, FBGA-144
文件頁(yè)數(shù): 11/28頁(yè)
文件大?。?/td> 1007K
代理商: HY5DS283222BF-28
Rev. 1.0 / Feb. 2005
11
1
HY5DS283222BF(P)
OPERATION COMMAND TRUTH TABLE - III
Current
State
/CS
/RAS
/CAS
/WE
Address
Command
Action
ROW
ACTIVATING
H
X
X
X
X
DSEL
NOP - Enter ROW ACT after tRCD
L
H
H
H
X
NOP
NOP - Enter ROW ACT after tRCD
L
H
H
L
X
BST
ILLEGAL
4
L
H
L
H
BA, CA, AP
READ/READAP
ILLEGAL
4,10
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
ILLEGAL
4,10
L
L
H
H
BA, RA
ACT
ILLEGAL
4,9,10
L
L
H
L
BA, AP
PRE/PALL
ILLEGAL
4,10
L
L
L
H
X
AREF/SREF
ILLEGAL
11
L
L
L
L
OPCODE
MRS
ILLEGAL
11
WRITE
RECOVERING
H
X
X
X
X
DSEL
NOP - Enter ROW ACT after tWR
L
H
H
H
X
NOP
NOP - Enter ROW ACT after tWR
L
H
H
L
X
BST
ILLEGAL
4
L
H
L
H
BA, CA, AP
READ/READAP
ILLEGAL
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
ILLEGAL
L
L
H
H
BA, RA
ACT
ILLEGAL
4,10
L
L
H
L
BA, AP
PRE/PALL
ILLEGAL
4,11
L
L
L
H
X
AREF/SREF
ILLEGAL
11
L
L
L
L
OPCODE
MRS
ILLEGAL
11
WRITE
RECOVERING
WITH
AUTOPRE-
CHARGE
H
X
X
X
X
DSEL
NOP - Enter precharge after tDPL
L
H
H
H
X
NOP
NOP - Enter precharge after tDPL
L
H
H
L
X
BST
ILLEGAL
4
L
H
L
H
BA, CA, AP
READ/READAP
ILLEGAL
4,8,10
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
ILLEGAL
4,10
L
L
H
H
BA, RA
ACT
ILLEGAL
4,10
L
L
H
L
BA, AP
PRE/PALL
ILLEGAL
4,11
L
L
L
H
X
AREF/SREF
ILLEGAL
11
L
L
L
L
OPCODE
MRS
ILLEGAL
11
REFRESHING
H
X
X
X
X
DSEL
NOP - Enter IDLE after tRC
L
H
H
H
X
NOP
NOP - Enter IDLE after tRC
L
H
H
L
X
BST
ILLEGAL
11
L
H
L
H
BA, CA, AP
READ/READAP
ILLEGAL
11
相關(guān)PDF資料
PDF描述
HY5DS283222BF-33 128M(4Mx32) GDDR SDRAM
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