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參數(shù)資料
| 型號： | HY57V641620HGLT-8I |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | CAP SMD 0805 .01UF 50V 5% |
| 中文描述： | 4M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO54 |
| 封裝： | 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 145K |
| 代理商： | HY57V641620HGLT-8I |
HY57V641620HG
Rev. 1.0/Jan. 02
8
AC CHARACTERISTICS II
Note :
1. A new command can be given tRRC after self refresh exit
Parameter
Symbo
l
-5I
-55I
-6I
-7I
-KI
-HI
-8I
-PI
-SI
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min Max
Min
Max
Min
Max
RAS Cycle
Time
Operation
t
RC
55
-
55
-
60
-
62
-
65
-
65
-
68
-
70
-
70
-
ns
Auto Refresh
t
RRC
60
-
60
-
60
-
62
-
65
-
65
-
68
-
70
-
70
-
ns
RAS to CAS Delay
t
RCD
15
-
16.5
-
18
-
20
-
15
-
20
-
20
-
20
-
20
-
ns
RAS Active Time
t
RAS
38.5 100K 38.5 100K
42
100
K
42
120K
45
120K
45
120K
48
100
K
50
120K
50
120K
ns
RAS Precharge Time
t
RP
15
-
16.5
-
18
-
20
-
15
-
20
-
20
-
20
-
20
-
ns
RAS to RAS Bank Active
Delay
t
RRD
10
-
11
-
12
-
14
-
15
-
15
-
16
-
20
-
20
-
ns
CAS to CAS Delay
t
CCD
1
-
1
-
1
-
1
-
1
-
1
-
1
-
1
-
1
-
CLK
Write Command to Data-In
Delay
t
WTL
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
CLK
Data-In to Precharge
Command
t
DPL
2
-
2
-
2
-
2
-
2
-
2
-
2
-
2
-
2
-
CLK
Data-In to Active Command
t
DAL
5
-
5
-
5
-
4
-
4
-
4
-
5
-
3
-
3
-
CLK
DQM to Data-Out Hi-Z
t
DQZ
2
-
2
-
2
-
2
-
2
-
2
-
2
-
2
-
2
-
CLK
DQM to Data-In Mask
t
DQM
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
CLK
MRS to New Command
t
MRD
2
-
2
-
2
-
1
-
1
-
1
-
2
-
1
-
1
-
CLK
Precharge to
Data Output
Hi-Z
CAS Latency
= 3
t
PROZ
3
3
-
3
-
3
-
3
-
3
-
3
-
3
-
3
-
3
-
CLK
CAS Latency
= 2
t
PROZ
2
2
-
2
-
2
-
2
-
2
-
2
-
2
-
2
-
2
-
CLK
Power Down Exit Time
t
PDE
1
-
1
-
1
-
1
-
1
-
1
-
1
-
1
-
1
-
CLK
Self Refresh Exit Time
t
SRE
1
-
1
-
1
-
1
-
1
-
1
-
1
-
1
-
1
-
CLK
1
Refresh Time
t
REF
-
64
-
64
-
64
-
64
-
64
-
64
-
64
-
64
-
64
ms
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY57V641620HGLT-P | 4 Banks x 1M x 16Bit Synchronous DRAM |
| HY57V641620HG-I | 4 Banks x 1M x 16Bit Synchronous DRAM |
| HY57V641620HGLT-5I | 4 Banks x 1M x 16Bit Synchronous DRAM |
| HY57V641620HGT-PI | CONNECTOR ACCESSORY |
| HY57V641620HG | 4 Banks x 1M x 16Bit Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY57V641620HGLT-H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SDRAM |
| HY57V641620HGLT-HI | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 1M x 16Bit Synchronous DRAM |
| HY57V641620HGLT-I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4Mx16|3.3V|4K|5|SDR SDRAM - 64M |
| HY57V641620HGLT-K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SDRAM |
| HY57V641620HGLT-KI | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 1M x 16Bit Synchronous DRAM |
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