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參數(shù)資料
| 型號： | HY57V561620CLTP-7 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 4 Banks x 4M x 16Bit Synchronous DRAM |
| 中文描述： | 16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封裝： | 0.400 X 0.875 INCH, 0.80 MM PITCH, LEAD FREE, TSOP2-54 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 217K |
| 代理商： | HY57V561620CLTP-7 |
HY57V561620C(L)T(P)
Rev. 0.5 / June 2004 8
AC CHARACTERISTICS II
Note :
1. A new command can be given tRRC after self refresh exit
Parameter
Symbol
-6
-7
-K
-H
-8
-P
-S
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
RAS Cycle Time
Operation
tRC
60
-
60
-
60
-
65
-
68
-
70
-
70
-
ns
Auto Refresh
tRRC
60
-
60
-
60
-
65
-
68
-
70
-
70
-
ns
RAS to CAS Delay
tRCD
18
-
18
-
15
-
20
-
20
-
20
-
20
-
ns
RAS Active Time
tRAS
42
100K
42
100K
45
100K
45
100K
48
100K
50
100K
50
100K
ns
RAS Precharge Time
tRP
18
-
18
-
15
-
20
-
20
-
20
-
20
-
ns
RAS to RAS Bank Active Delay
tRRD
12
-
14
-
15
-
15
-
16
-
20
-
20
-
ns
CAS to CAS Delay
tCCD
1
-
1
-
1
-
1
-
1
-
1
-
1
-
CLK
Write Command to Data-In Delay
tWTL
0
-
0
-
0
-
0
-
0
-
0
-
0
-
CLK
Write Recovery Time
tWR
2
-
2
-
2
-
2
-
2
-
2
-
2
-
CLK
Data-In to Active Command
tDAL
5
-
5
-
5
-
5
-
5
-
5
-
5
-
CLK
DQM to Data-Out Hi-Z
tDQZ
2
-
2
-
2
-
2
-
2
-
2
-
2
-
CLK
DQM to Data-In Mask
tDQM
0
-
0
-
0
-
0
-
0
-
0
-
0
-
CLK
MRS to New Command
tMRD
2
-
2
-
2
-
2
-
2
-
2
-
2
-
CLK
Precharge to Data
Output Hi-Z
CAS Latency = 3
tPROZ3
3
-
3
-
3
-
3
-
3
-
3
-
3
-
CLK
CAS Latency = 2
tPROZ2
2
-
2
-
2
-
2
-
2
-
2
-
2
-
CLK
Power Down Exit Time
tPDE
1
-
1
-
1
-
1
-
1
-
1
-
1
-
CLK
Self Refresh Exit Time
tSRE
1
-
1
-
1
-
1
-
1
-
1
-
1
-
CLK
1
Refresh Time
tREF
-
64
-
64
-
64
-
64
-
64
-
64
-
64
ms
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY57V561620CLTP-8 | 4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620CLTP-H | 4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620CLTP-K | 4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620CLTP-P | 4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620CLTP-S | 4 Banks x 4M x 16Bit Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY57V561620CLTP-8 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620CLTP-H | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620CLTP-K | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620CLTP-P | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 4M x 16Bit Synchronous DRAM |
| HY57V561620CLTP-S | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 4M x 16Bit Synchronous DRAM |
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