參數(shù)資料
型號: HY57V561620CLT-7
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 4 Banks x 4M x 16Bit Synchronous DRAM
中文描述: 16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54
文件頁數(shù): 11/12頁
文件大?。?/td> 217K
代理商: HY57V561620CLT-7
HY57V561620C(L)T(P)
Rev. 0.5 / June 2004 11
COMMAND TRUTH TABLE
Note :
1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high
2. X = Don
t care, H = Logic High, L = Logic Low. BA =Bank Address, RA = Row Address, CA = Column Address,
Opcode = Operand Code, NOP = No Operation
Command
CKEn-1
CKEn
CS
RAS
CAS
WE
DQM
ADDR
A10/
AP
BA
Note
Mode Register Set
H
X
L
L
L
L
X
OP code
No Operation
H
X
H
X
X
X
X
X
L
H
H
H
Bank Active
H
X
L
L
H
H
X
RA
V
Read
H
X
L
H
L
H
X
CA
L
V
Read with Autoprecharge
H
Write
H
X
L
H
L
L
X
CA
L
V
Write with Autoprecharge
H
Precharge All Banks
H
X
L
L
H
L
X
X
H
X
Precharge selected Bank
L
V
Burst Stop
H
X
L
H
H
L
X
X
DQM
H
X
V
X
Auto Refresh
H
H
L
L
L
H
X
X
Burst-Read-Single-WRITE
H
X
L
L
L
H
X
A9 Pin High
(Other Pins OP code)
Self Refresh
1
Entry
H
L
L
L
L
H
X
X
Exit
L
H
H
X
X
X
X
L
H
H
H
Precharge
power down
Entry
H
L
H
X
X
X
X
X
L
H
H
H
Exit
L
H
H
X
X
X
X
L
H
H
H
Clock
Suspend
Entry
H
L
H
X
X
X
X
X
L
V
V
V
Exit
L
H
X
X
相關(guān)PDF資料
PDF描述
HY57V561620CLT-H 4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620CLT-K 4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620CLT-P 4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620CLTP-6 4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620CLTP-7 4 Banks x 4M x 16Bit Synchronous DRAM
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參數(shù)描述
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HY57V561620CLT-K 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620CLT-P 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 4M x 16Bit Synchronous DRAM
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