參數(shù)資料
型號(hào): HY57V561620B
廠商: Hynix Semiconductor Inc.
英文描述: 4 Banks x 4M x 16Bit Synchronous DRAM
中文描述: 4銀行x 4米× 16位同步DRAM
文件頁(yè)數(shù): 11/12頁(yè)
文件大小: 167K
代理商: HY57V561620B
HY57V561620B(L)T-I
Rev.1.3 / Apr. 2003 11
COMMAND TRUTH TABLE
Note :
1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high
2. X = Don
t care, H = Logic High, L = Logic Low. BA =Bank Address, RA = Row Address, CA = Column Address,
Opcode = Operand Code, NOP = No Operation
Command
CKEn-1
CKEn
CS
RAS
CAS
WE
DQM
ADDR
A10/
AP
BA
Note
Mode Register Set
H
X
L
L
L
L
X
OP code
No Operation
H
X
H
X
X
X
X
X
L
H
H
H
Bank Active
H
X
L
L
H
H
X
RA
V
Read
H
X
L
H
L
H
X
CA
L
V
Read with Autoprecharge
H
Write
H
X
L
H
L
L
X
CA
L
V
Write with Autoprecharge
H
Precharge All Banks
H
X
L
L
H
L
X
X
H
X
Precharge selected Bank
L
V
Burst Stop
H
X
L
H
H
L
X
X
DQM
H
X
V
X
Auto Refresh
H
H
L
L
L
H
X
X
Burst-Read-Single-
WRITE
H
X
L
L
L
H
X
A9 Pin High
(Other Pins OP code)
Self Refresh
1
Entry
H
L
L
L
L
H
X
X
Exit
L
H
H
X
X
X
X
L
H
H
H
Precharge
power down
Entry
H
L
H
X
X
X
X
X
L
H
H
H
Exit
L
H
H
X
X
X
X
L
H
H
H
Clock
Suspend
Entry
H
L
H
X
X
X
X
X
L
V
V
V
Exit
L
H
X
X
相關(guān)PDF資料
PDF描述
HY57V561620BLT-6I 4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620BLT-8I 4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620BLT-HI 4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620BLT-KI 4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620BLT-PI 4 Banks x 4M x 16Bit Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HY57V561620BLT 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:16Mx16|3.3V|8K|K|SDR SDRAM - 256M
HY57V561620BLT-6I 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620BLT-8I 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620BLT-HI 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4 Banks x 4M x 16Bit Synchronous DRAM
HY57V561620BLT-I 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:16Mx16|3.3V|8K|6/K/H/8/P/S|SDR SDRAM - 256M