參數(shù)資料
型號: HY57V281620AT-KI
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 4 Banks x 2M x 16bits Synchronous DRAM
中文描述: 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54
文件頁數(shù): 10/11頁
文件大小: 81K
代理商: HY57V281620AT-KI
HY57V281620A
Rev. 0.4/Apr.01
10
COMMAND TRUTH TABLE
Note :
1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high
2. X = Don
t care, H = Logic High, L = Logic Low. BA =Bank Address, RA = Row Address, CA = Column Address,
Opcode = Operand Code, NOP = No Operation
C o m m a n d
C K E n - 1
C K E n
C S
R A S
C A S
W E
D Q M
A D D R
A10/
AP
BA
Note
Mode Register Set
H
X
L
L
L
L
X
O P c o d e
No Operation
H
X
H
X
X
X
X
X
L
H
H
H
Bank Active
H
X
L
L
H
H
X
R A
V
Read
H
X
L
H
L
H
X
C A
L
V
Read with Autoprecharge
H
Write
H
X
L
H
L
L
X
C A
L
V
Write with Autoprecharge
H
Precharge All Banks
H
X
L
L
H
L
X
X
H
X
Precharge selected Bank
L
V
Burst Stop
H
X
L
H
H
L
X
X
D Q M
H
X
V
X
Auto Refresh
H
H
L
L
L
H
X
X
Self Refresh
1
Entry
H
L
L
L
L
H
X
X
Exit
L
H
H
X
X
X
X
L
H
H
H
Precharge
power down
Entry
H
L
H
X
X
X
X
X
L
H
H
H
Exit
L
H
H
X
X
X
X
L
H
H
H
Clock
Suspend
Entry
H
L
H
X
X
X
X
X
L
V
V
V
Exit
L
H
X
X
相關(guān)PDF資料
PDF描述
HY57V281620AT-PI 4 Banks x 2M x 16bits Synchronous DRAM
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