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參數資料
| 型號： | HY51VS18163HG |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | 1M x 16Bit EDO DRAM |
| 中文描述： | 100萬× 16 EDO公司的DRAM |
| 文件頁數： | 5/12頁 |
| 文件大小： | 107K |
| 代理商： | HY51VS18163HG |
HY51V(S)18163HG/HGL
Rev.0.1/Apr.01
5
DC CHARACTERISTICS
(Vcc = 3.3V +/- 10%, TA=0 to 70
°
C
)
Note :
1. Icc depends on output load condition when the device is selected, Icc(max) is specified at the output open condition
2. Address can be changed once or less while /RAS=VIL
3. Address can be changed once or less while /CAS=VIH
4. /CAS = L (<=0.2) while /RAS=L (<=0.2)
5. L-Version
Symbol
Parameter
Min
Max
Unit
Note
VOH
Output Level
Output Level voltage(Iout= -2mA)
2.4
Vcc
V
VOL
Output Level
Output Level voltage(Iout=2mA)
0
0.4
V
ICC1
Operating current
Average power supply operating current
( /RAS, /CAS Cycling : tRC = tRC min)
50ns
-
190
mA
1, 2
60ns
-
170
70ns
-
150
I
CC2
Standby current (TTL interface)
Power supply standby current
(/RAS, /CAS=VIH, Dout = High-Z)
-
2
mA
ICC3
/RAS only refresh current
Average power supply current
/RAS only refresh mode
(tRC= tRC min)
50ns
-
190
mA
2
60ns
-
170
70ns
-
150
ICC4
EDO page mode current
Average power supply current
EDO page mode (tPC=tPC min)
50ns
-
185
mA
1, 3
60ns
-
165
70ns
-
145
ICC5
CMOS interface ( /RAS, /CAS >= Vcc-0.2V, Dout = High-Z)
-
1
mA
Standby current ( L-version)
-
150
uA
5
ICC6
/CAS-before-/RAS refresh current (tRC=tRC min)
50ns
-
190
mA
60ns
-
170
70ns
-
150
ICC7
Battery back up operating current ( standby with CBR ref.)
(CBR refresh, tRC=31.3us, tRAS <= 0.3us, Dout = High-Z, CMOS interface)
-
400
uA
4, 5
ICC8
Standby current
(RAS=V
IH
, /CAS=V
IL
, Dout=Enable)
-
5
mA
1
ICC9
Self refresh current
(/RAS, /CAS <=0.2V, Dout=High-Z)
-
250
uA
5
II(L)
Input leakage current, Any input (0V<= Vin<=4.6V)
-10
10
uA
IO(L)
Output leakage current, (Dout is disabled, 0V<= Vout<=4.6V)
-10
10
uA
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