參數(shù)資料
型號(hào)： HY29F400TR-70
廠商： HYNIX SEMICONDUCTOR INC
元件分類(lèi)： DRAM
英文描述： x8/x16 Flash EEPROM
中文描述： 256K X 16 FLASH 5V PROM, 70 ns, PDSO48
封裝： REVERSE, TSOP-48
文件頁(yè)數(shù)： 18/40頁(yè)
文件大?。?/td> 509K
代理商： HY29F400TR-70
18
Rev. 5.2/May 01
HY29F400
HARDWARE DATA PROTECTION
The HY29F400 provides several methods of pro-
tection to prevent accidental erasure or program-
ming which might otherwise be caused by spuri-
ous system level signals during V
CC
power-up and
power-down transitions, or from system noise.
These methods are described in the sections that
follow.
Command Sequences
Commands that may alter array data require a
sequence of cycles as described in Table 5. This
provides data protection against inadvertent writes.
Low V
CC
Write Inhibit
To protect data during V
CC
power-up and power-
down, the device does not accept write cycles
when V
CC
is less than V
LKO
(typically 3.7 volts). The
command register and all internal program/erase
circuits are disabled, and the device resets to the
Read mode. Writes are ignored until V
CC
is greater
than V
LKO
. The system must provide the proper
signals to the control pins to prevent unintentional
writes when V
CC
is greater than V
LKO
.
sector erase timer does not apply to the Chip Erase
command.
After the initial Sector Erase command sequence
is issued, the system should read the status on
DQ[7] (Data# Polling) or DQ[6] (Toggle Bit I) to
ensure that the device has accepted the command
sequence, and then read DQ[3]. If DQ[3] is a
‘
1
’
,
the internally controlled erase cycle has begun and
all further sector erase data cycles or commands
Read DQ[7:0]
at Valid Address (Note 1)
DQ[6] Toggled
NO
(Note 3)
YES
PROGRAM/ERASE
COMPLETE
DQ[5] = 1
NO
YES
Read DQ[7:0]
at Valid Address (Note 1)
DQ[6] Toggled
(Note 2)
NO
YES
PROGRAM/ERASE
EXCEEDED TIME ERROR
Notes
:
1. During programming, the program address.
During sector erase, an address within any sector scheduled for erasure.
2. Recheck DQ[6] since toggling may stop at the same time as DQ[5] changes from 0 to 1.
3. Use this path if testing for Program/Erase status.
4. Use this path to test whether sector is in Erase Suspend mode.
Read DQ[7:0]
at Valid Address (Note 1)
START
Read DQ[7:0]
DQ[2] Toggled
NO
SECTOR BEING READ
IS IN ERASE SUSPEND
Read DQ[7:0]
YES
NO
(Note 4)
SECTOR BEING READ
IS NOT IN ERASE SUSPEND
Figure 8. Toggle Bit I and II Test Algorithm
(other than Erase Suspend) are ignored until the
erase operation is complete. If DQ[3] is a
‘
0
’
, the
device will accept a sector erase data cycle to mark
an additional sector for erasure. To ensure that
the data cycles have been accepted, the system
software should check the status of DQ[3] prior to
and following each subsequent sector erase data
cycle. If DQ[3] is high on the second status check,
the last data cycle might not have been accepted.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HY29F400TR90 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory
HY29F400TR-90 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:x8/x16 Flash EEPROM
HY29F400TT45 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory
HY29F400TT-45 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:x8/x16 Flash EEPROM
HY29F400TT55 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory
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