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參數(shù)資料
| 型號： | HV-2405E |
| 廠商： | Intersil Corporation |
| 英文描述： | World-WideSingle Chip Power Supply |
| 中文描述： | 世界WideSingle電源芯片 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 699K |
| 代理商： | HV-2405E |
4-
5
that after the 17th line cycle the input current is approxi-
mately 1.4A. At this point C2 is fully charged. The input cur-
rent required to maintain the voltage on C2 is less than the
current to charge it and the circuit has reached steady state
operation. Since the steady state current is less than the
input current limit, the circuit in the shaded area is off and no
longer has any effect.
FIGURE 2. START UP OPERATION
Under short circuit operation the maximum voltage on pin 2
is less than 10V and the input current limiting circuit is
invoked. Figure 3 shows that under output short circuit con-
ditions, the input current is limited to about 800mA. The
effects on the output current when the input current limiting
circuit is invoked is illustrated in Figure 6.
FIGURE 3. SHORT CIRCUIT OPERATION
Design Equations for Input Current Limiting
Initial Start-Up
Assume:
R4 = 5.6k
, R5 = 3.3k
, R6 = 5.6k
, V
BE
= 0.54V, I
TRIG
=
60
μ
A, V
Pin 8
- V
Pin 2
= 3.5V at low inputs currents. V
IN1
=
V
C2
= 0V, R1 = 100
, R2 = 220k
, R3 = 3.9k
,
Voltage on AC high when input current limit circuit is invoked
(V
C2
= 0V)
Equation 1 through Equation 4, for the given assumptions,
predict that the initial input current will be limited to 393mA.
The following equations can be used to predict the maximum
input current during start-up.
V
C2
> 10V, R1 = 100
, R2 = 220k
, R3 = 3.9k
,
R4 = 5.6k
, R5 = 5.6k
, R6 = 3.3k
, V
BE
= 0.54V, I
TRIG
=
60
μ
A, V
Z
= 5.1V, V
Pin 8
- V
Pin 2
= 6V at high inputs currents,
V
Pin 2
- V
Pin 6
, V
IN2
= Voltage on AC high when input cur-
rent circuit is invoked (V
C2
> 10V).
Assume:
Equation 5 through Equation 9 predict the maximum input
current will be limited to less than 2.05A. In practice at 5V
operation the current is less than predicted due to the low
bias current through Z2.
Setting The Output Voltage
The circuit shown in Figure 1 provides a regulated 5V to 24V
DC and is set by adjusting the value of Z1. The output volt-
age of the HV-2405E (pin 6) is set by feedback to the sense
pin (pin 5). The output will rise to the voltage necessary to
keep the sense pin at 5V. The output voltage is equal to the
Zener voltage (V
Z1
) plus the 5V on the sense pin. For a 5V
output, pin 5 and pin 6 would be shorted together. The out-
put voltage has the accuracy and tolerance of both the Zener
diode and the band-gap of the HV-2405E (see Figure 16).
The maximum output voltage is limited by Z
B2
to
≈
34V
DC
.
Z
B2
protects the output by ensuring that an overvoltage con-
dition does not exist. Note: the output voltage can also be
set by placing a resistor (1/4W) between pin 5 and pin 6. If a
resistor is placed between pin 5 and pin 6 an additional 1V
per k
(
±
10%) is added to the 5V output.
Optimizing Design
(World-Wide Supply)
Selecting the Storage Capacitor C2
For applications requiring less than 50mA or the full input
V
IN
= 264Vrms
(500V/DIV)
INPUT CURRENT
(1A/DIV)
I
P
≈
0.8A
V
C2
(10V/DIV)
V
OUT
(5V/DIV)
C2 FULLY CHARGED
TIME (50ms/DIV)
OFFLINE WORLD-SIDE SUPPLY
I
OUT
= 50mA
V
IN
= 264Vrms
(500V/DIV)
INPUT CURRENT
(1A/DIV)
I
P
≈
0.8A
V
C2
(10V/DIV)
V
OUT
(5V/DIV)
OFFLINE WORLD-WIDE SUPPLY
TIME (50ms/DIV)
I
IN(min)
=
V
IN1
- V
Pin 8
- V
Pin 2
R1
(EQ 1)
V
IN1
=
R2 + R3
(V
BE
+
R4 (R5 + R6)
x I
TRIG
)
(EQ. 2)
R3
R4 + R5 + R6
V
IN1
= 57.41 (0.54 + 3.437k
x 60
μ
A) = 42.84V
I
IN(min)
=
100
(EQ. 3)
42.84 - 3.5
= 393mA
(EQ. 4)
I
IN(max)
=
V
IN2
- V
OUT
- (V
Pin 8
- V
Pin 2
) - (V
Pin 2
- V
Pin 6
)
R1
(EQ. 5)
V
IN2
=
R2 + R3
(V
BE
+
R4 R5
x I
TRIG
+
R4
V
Z2
(EQ. 6)
R3
R4 + R5
R4 + R5
V
IN2
= 57.41 [0.54 + (2.076k
x 60
μ
A) + (0.6292 x 5.1)]
222 - V
OUT
-6 -
6
= 2.05A at V
OUT
= 5V
100
(EQ. 7)
I
IN(max)
=
(EQ. 8)
I
IN(max)
=
222 - V
OUT
-6 -
6
= 1.86A at V
OUT
= 24V
(EQ. 9)
100
HV-2405E
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