參數(shù)資料
型號(hào)： HT95A20P
廠商： Holtek Semiconductor Inc.
英文描述： 8-Bit LCD Type Phone Controller MCU
中文描述： 8位LCD型電話MCU控制器
文件頁(yè)數(shù)： 7/42頁(yè)
文件大?。?/td> 768K
代理商： HT95A20P
HT95L100/10P
Rev. 0.10
7
October 1, 2002
Preliminary
Program memory
ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
4096 16bits,addressedbytheprogramcounterandta-
blepointer.Certainlocationsintheprogrammemoryare
reserved for special usage:
Location 0000H
This area is reserved for the initialization program. Af-
ter chip power-on reset or external reset or WDT
time-out reset, the program always begins execution
at location 0000H.
Location 0004H
This area is reserved for the external interrupt service
program. If the INT/TMR1 input pin is activated, the
external interrupt is enabled and the stack is not full,
the program begins execution at location 0004H.
Location 0008H
ThisareaisreservedfortheTimer/EventCounter0in-
terrupt service program. If a timer interrupt results
from a Timer/Event Counter 0 overflow, the
Timer/Event Counter 0 interrupt is enabled and the
stack is not full, the program begins execution at loca-
tion 0008H.
Location 000CH
This location is reserved for the Timer/Event Counter
1 interrupt service program. If a timer interrupt results
from a Timer/Event Counter 1 overflow, the
Timer/Event Counter 1 interrupt is enabled and the
stack is not full, the program begins execution at loca-
tion 000CH.
Location 0014H
This location is reserved for real time clock (RTC) in-
terrupt service program. When RTC generator is en-
abled and time-out occurs, the RTC interrupt is
enabled and the stack is not full, the program begins
execution at location 0014H.
Location 0018H
This location is reserved for the HKS pin edge transi-
tion or HDI pin falling edge transition or HFI pin rising
edge transition. If this condition occurs, the dialer I/O
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 18H.
Table location
Any location in the ROM space can be used as look-up
tables. The instructions
TABRDC [m]
(the current
page, one page=256 words) and TABRDL [m] (the last
page)transferthecontentsofthelower-orderbytetothe
specified data memory, and the higher-order byte to
TBLH (08H). Only the destination of the lower-order
byte in the table is well-defined, and the higher-order
byte of the table word is transferred to TBLH. The table
pointer (TBLP) is a read/write register (07H), which indi-
cates the table location. Before accessing the table, the
location must be placed in the TBLP. The TBLH is read
only and cannot be restored. If the main routine and the
ISR (Interrupt Service Routine) both employ the table
read instruction, the contents of the TBLH in the main
routine are likely to be changed by the table read in-
struction used in the ISR. Errors will then occur. Hence,
simultaneously using the table read instruction in the
main routine and the ISR should be avoided. However, if
the table read instruction has to be applied in both the
main routine and the ISR, the interrupt is supposed to be
disabled prior to the table read instruction. It will not be
enabled until the TBLH has been backed-up. All table
related instructions require two cycles to complete the
operation. These areas may function as normal pro-
gram memory depending on the requirements.
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Program memory
Instruction(s)
Table Location
*11
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P11
P10
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Note: *11~*0: Table location bits
P11~P8: Current program counter bits
@7~@0: Table pointer bits
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