參數(shù)資料
型號(hào): HT95A100
廠商: Holtek Semiconductor Inc.
英文描述: I/O Type Phone 8-Bit MCU
中文描述: I / O型電話8位微控制器
文件頁數(shù): 11/48頁
文件大?。?/td> 360K
代理商: HT95A100
HT95AXXX
Rev. 1.20
11
May 26, 2004
Indirect Addressing Register
Location 00H and 02H are indirect addressing registers
that are not physically implemented. Any read/write op-
eration of [00H] and [02H] will access the memory
pointed to by MP0 and MP1, respectively. Reading loca-
tion [00H] or [02H] indirectly returns the result 00H,
while writing it leads to no operation. MP0 is indirectly
addressable in bank0, but MP1 is available for all banks
by switch BP [04H]. If BP is unequal to 00H, the indirect
addressing mode to read/write operation from 00H~3FH
will return the result as same as the value of bank0.
The memory pointer registers MP0 and MP1 are 8-bits
registers, and the bank pointer register BP is 6-bits reg-
ister for the HT95A400/40P or 5-bits for the other de-
vices in the series.
Accumulator
The accumulator is closely related to ALU operations. It
is also mapped to location 05H of the data memory and
can operate with immediate data. All data movement
between two data memory locations must pass through
the accumulator.
Arithmetic and Logic Unit
ALU
This circuit performs 8-bit arithmetic and logic opera-
tions and provides the following functions:
Arithmetic operations (ADD, ADC, SUB, SBC, DAA)
Logic operations (AND, OR, XOR, CPL)
Rotation (RL, RR, RLC, RRC)
Increment and Decrement (INC, DEC)
Branch decision (SZ, SNZ, SIZ, SDZ, etc.)
The ALU not only saves the results of a data operation
but also changes the status register.
Status Register
STATUS
This status register contains the carry flag (C), auxiliary
carry flag (AC), zero flag (Z), overflow flag (OV), power
down flag (PDF), and watchdog time-out flag (TO). It
also records the status information and controls the op-
eration sequence.
Except for the TO and PDF flags, bits in the status regis-
ter can be altered by instructions, similar to the other
registers. Data written into the status register will not
change the TO or PDF flag. Operations related to the
status register may yield different results from those in-
tended. The TO flag can be affected only by system
power-up, a WDT time-out or executing the CLR WDT
or HALT instruction. The PDF flag can be affected only
by executing the HALT or CLR WDT instruction or
during a system power-up.
The Z, OV, AC and C flags generally reflect the status of
the latest operations.
On entering the interrupt sequence or executing the
subroutine call, the status register will not be automati-
cally pushed onto the stack.
If the contents of the status are important and if the sub-
routine can corrupt the status register, precautions must
be taken to save it .
Interrupt
The telephone controller provides an external interrupt,
internal timer/event counter interrupt, an internal real
time clock interrupt and internal dialer I/O interrupt. The
Interrupt Control Registers 0 and Interrupt Control Reg-
ister 1 both contains the interrupt control bits that set the
enable/disable and the interrupt request flags
Once an interrupt subroutine is serviced, all the other in-
terrupts will be blocked (by hardware clearing the EMI
bit). This scheme may prevent any further interrupt nest-
ing. Other interrupt requests may occur during this inter-
val but only the interrupt request flag is recorded. If a
certain interrupt requires servicing within the service
routine, the EMI bit and the corresponding bit of the
INTC0 (INTC1) may be set to allow interrupt nesting.
Register
Label
Bits
Function
STATUS
(0AH)
C
0
C is set if the operation results in a carry during an addition operation or if a borrow
does not take place during a subtraction operation; otherwise C is cleared. Also it is
affected by a rotate through carry instruction.
AC
1
AC is set if the operation results in a carry out of the low nibbles in addition or no bor-
rowfromthehighnibbleintothelownibbleinsubtraction;otherwiseACiscleared.
Z
2
Z is set if the result of an arithmetic or logic operation is 0; otherwise Z is cleared.
OV
3
OV is set if the operation results in a carry into the highest-order bit but not a carry
out of the highest-order bit, or vice versa; otherwise OV is cleared.
PDF
4
PDF is cleared when either a system power-up or executing the CLR WDT instruc-
tion. PDF is set by executing the HALT instruction.
TO
5
TO is cleared by a system power-up or executing the CLR WDT or HALT instruction.
TO is set by a WDT time-out.
6, 7
Unused bit, read as 0
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