HT9274
5
November 23, 1999
Functional Description
Input stage
The input stage of op amps are nominal PMOS
differential amplifiers (see the following dia-
gram), therefore the common mode input volt-
age can extend to V
SS
-0.6V. On the other hand
the common mode input voltage has to be main-
tained below (V
DD
-1)V to keep the input device
(M2 and M3) active. This implies that when us-
ing HT9274 as a voltage follower, the input as
well as output active range will be limited be-
tween V
SS
~ V
DD
-1V (approx.). Avoid applying
any voltage greater than V
DD
+0.6V or less than
V
SS
-0.6V to the input pins, otherwise the inter-
nal input protection devices may be damaged.
Since the input impedance of PMOS is inher-
ently very high, it can directly couple to high
impedance elements without loading effect. For
example, coupling to ceramic transducers, inte-
grating capacitor and resistor networks.
Actually the extremly high input impedance is
its major advantage over the bipolar counter-
part, in some application fields such as integra-
tors where the input current of op amp can
cause significant error, the HT9274 is a better
choice than the popular LM324.
Output stage
The HT9274 uses push-pull CMOS configura-
tion as the output stage of op amps to minimize
low power consumption and to provide ade-
quate output driving current.
Note that the output is an unbuffered struc-
ture, therefore the open loop gain will be af-
fected by the load resistor since the voltage gain
of this stage can be expressed as (gm5+
gm6) R
L
.
Because of the consideration for minimized
power consumption, the max. output current is
limited to about 400 Afor both source and sink
drive. This is believed to be enough for most low
power systems, however it is recommended to
use the load resistor of >10k
cations. In case of heavy load driving, an exter-
nal buffer stage using bipolar transistors is
recommended.
for normal appli-
The HT9274 is internally compensated for AC
stability and capable to withstand up to a
100pF capacitive load.
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