參數(shù)資料
型號(hào)： HT86030
廠商： Holtek Semiconductor Inc.
英文描述： Voice Synthesizer 8-Bit MCU
中文描述： 語(yǔ)音合成器8位微控制器
文件頁(yè)數(shù)： 20/40頁(yè)
文件大?。?/td> 256K
代理商： HT86030
HT86030/HT86070
Rev. 1.10
20
May 25, 2006
Voice ROM Data Address Latch Counter
LATCH0H(18H)/LATCH0M(19H)/LATCH0L(1AH),
LATCH1H(1BH)/LATCH1M(1CH)/LATCH1L(1DH) and
voice ROM data register(2AH)
The voice ROM data address latch counter is the hand-
shaking between the microcontroller and voice ROM,
where the voice codes are stored. One 8-bit of voice
ROM data will be addressed by setting 18-bit address
latch counter LATCH0H/LATCH0M/LATCH0L or
LATCH1H/LATCH1M/LATCH1L. After the 8-bit voice
ROM data is addressed, a few instruction cycles (4 s at
least) will be cost to latch the voice ROM data, then the
microcontroller can read the voice data from
LATCHD(2AH).
Example: Read an 8-bit voice ROM data which is lo-
cated at address 000007H by address latch 0
set
[26H].2
; Enable voice ROM circuit
clr
[26H].4
; Select voice ROM address
; latch counter 0
mov
A, 07H
;
mov
LATCH0L, A
; Set LATCH0L to 07H
mov
A, 00H
;
mov
LATCH0M, A ; Set LATCH0M to 00H
mov
A, 00H
;
mov
LATCH0H, A ; Set LATCH0H to 00H
call
Delay Time
; Delay a short period of time
mov
A, LATCHD
; Get voice data at 000007H
Bit No.
Label
Function
0, 3, 5~6
Unused bit, read as 0
1
DAC
Enable/disable DAC circuit (0= disable DAC circuit; 1= enable DAC circuit)
The DAC circuit is not affected by the HALT instruction.
The software controls bit DAC (VoiceC.1) whether to enable/disable.
2
VROMC
Enable/disablevoiceROMcircuit(0=disablevoiceROMcircuit;1=enablevoiceROMcircuit)
4
LATCHC Select voice ROM counter (0= voice ROM address latch 0; 1= voice ROM address latch 1)
VOICEC (26H) Register
Mask Option
Mask Option
Description
PA Wake-up
Enable/disable PA wake-up function
Watchdog Timer (WDT)
Enable/disable WDT function
One or two CLR instruction
WDT clock source is from WDTOSC or T1
External INT Trigger Edge
External INT is triggered on falling edge only, or is triggered on falling and rising
edge.
External Timer 0/1 Clock Source Enable/disable external timer of timer 0 and timer 1.
PA Pull-high
Enable/disable PA pull-high
PB Pull-high
Enable/disable PB pull-high
f
OSC
R
OSC
Table (V
DD
=3V)
f
OSC
R
OSC
4MHz 10%
6MHz 10%
8MHz 10%
300k
200k
150k
相關(guān)PDF資料
PDF描述
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參數(shù)描述
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