參數(shù)資料
型號: HT604
廠商: Holtek Semiconductor Inc.
英文描述: 318 Series of Decoders
中文描述: 318系列解碼器
文件頁數(shù): 5/9頁
文件大?。?/td> 132K
代理商: HT604
HT604L/HT614/HT692
5
September 8, 2000
Functional Description
Operation
The 3
18
series of decoders provide various com-
binations of address and data pins in different
packages. It is paired with the 3
18
series of
encoders. The decoders receive data transmit-
ted by the encoders and interpret the first N
bits of the code period as address and the last
18 N bits as data (where N is the address code
number). A signal on the DIN pin then acti-
vates the oscillator which in turns decodes the
incoming address and data. The decoders will
check the received address twice continuously.
If all the received address codes match the con-
tents of the decoder s local address, the 18 N
bits of data are decoded to activate the output
pins, and the VT pin is set high to indicate a
valid transmission. That will last until the ad-
dress code is incorrect or no signal has been re-
ceived. The output of the VT pin is high only
when the transmission is valid. Otherwise it is
always low.
Output type
There are two types of output to select from:
Momentary type
The data outputs follow the encoder during a
valid transmission and then reset.
Latch type
The data outputs follow the encoder during a
valid transmission, and are then latched in
this state until the next valid transmission
occurs.
Flowchart
Note: The oscillator is disabled in the
standby state and activated as long as
a logic high signal is applied to the
DIN pin. i.e., the DIN should be kept
low if there is no signal input.
0
1
"
0
"
"
"
0
2
2 3
4
0
"
0
$
1
5 -
3
#
$2
1
-
1
6
1
7 4
相關PDF資料
PDF描述
HT604L 318 Series of Decoders
HT6256DB x8 SRAM
HT6256DC x8 SRAM
HT6256DS x8 SRAM
HT6264-70(28DIP) x8 SRAM
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