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參數(shù)資料
| 型號： | HT5F208 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 0.8m CMOS High Speed Gate Array(0.8m CMOS高速門陣列) |
| 中文描述： | 0.8米的CMOS高速門陣列（0.8米的CMOS高速門陣列） |
| 文件頁數(shù)： | 4/4頁 |
| 文件大?。?/td> | 161K |
| 代理商： | HT5F208 |
HT5F
0.5 m CMOS High Speed Gate Array
5V I/O Pad Library
Input pads
–
Inverting, noninverting
–
CMOS, TTL
–
Clock driver with CMOS buffer
–
Clock driver with TTL buffer
Output pads
–
2mA, 4mA, 8mA, 12mA, 16mA, 24mA
driving capability
–
Output only, 3-state output, with
pull-up/pull-down resistor
–
CMOS level, TTL level
–
with limited slew rate control
Bidirectional pads
–
2mA, 4mA, 8mA, 12mA, 16mA, 24mA
driving capability
–
3-state output, with pull-up/pull-down
resistor
–
CMOS level, TTL level
–
with limited slew rate control
3.3V I/O Pad Library
Input pads
–
Inverting, noninverting
–
CMOS, TTL
–
Clock driver with CMOS buffer
–
Clock driver with TTL buffer
Output pads
–
2mA, 4mA, 8mA, 12mA, 16mA, 24mA
driving capability
–
Output only, 3-state output, with
pull-up/pull-down resistor
–
CMOS level, TTL level
–
with limited slew rate control
Bidirectional pads
–
2mA, 4mA, 8mA, 12mA, 16mA, 24mA
driving capability
–
3-state output, with pull-up/pull-down
resistor
–
CMOS level, TTL level
–
with limited slew rate control
Cell Library
Buffers
–
Inverting, noninverting, tri-state,
clock buffer
NAND/AND gates
NOR/OR gates
AOI/OAI gates
XNOR/XOR gates
Delay cells
–
2ns, 4ns, 7ns, 10ns
Parity generator
–
8 bits even, 8 bits odd
Flip-flops
–
D-type, T-type, JK-type
Multiplexed flip-flops
Latches
–
with set, with clear, with set and clear,
Nor-Latch
–
NAND-latch, scannable latch
Adders
–
1-bit Half, 1-bit Full
Decoders
–
2-to-4, 3-to-8
Multiplexers
–
2-to-1, 3-to-1, 4-to-1, 5-to-1, 8-to-1
Comparator
Miscellaneous
–
Internal pull-up/pull-down, bus holder,
RAM cell
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