HT49C30L
* The IC substrate should be connected to VSS in the PCB layout artwork.
Pad Description
Pad Name
I/O
Options
Description
PA0/BZ
PA1/BZ
PA2
PA3/PFD
PA4~PA7
I/O
Wake-up
Pull-high
or None
CMOS or
NMOS
PA0~PA7 constitute an 8-bit bidirectional input/output port with Schmitt trig-
ger input capability. Each bit on port can be configured as a wake-up input by
options. PA0~PA3 can be configured as a CMOS output or NMOS input/out-
put with or without pull-high resistor by options. PA4~PA7 are always
pull-high NMOS input/output. Of the eight bits, PA0~PA1 can be set as I/O
pins or buzzer outputs by options. PA3 can be set as an I/O pin or as a PFD
output also by options.
PB0/INT0
PB1/INT1
PB2/TMR
PB3~PB5
I
PB0~PB5 constitute a 6-bit Schmitt trigger input port. Each bit on port are
withpull-highresistor.Ofthesixbits,PB0andPB1canbesetasinputpinsor
as external interrupt control pins (INT0) and (INT1) respectively, by software
application. PB2 can be set as an input pin or as a timer/event counter input
pin TMR also by software application.
VSS
Negative power supply, ground
VLCD
I
LCD power supply for HT49R30A-1/HT49C30-1.
Voltage pump for HT49C30L.
V2
I
Voltage pump for HT49R30A-1/HT49C30-1.
LCD power supply for HT49C30L.
V1,C1,C2
I
Voltage pump
SEG18/COM3
COM2~COM0
O
1/2 or 1/3 or 1/4
Duty
SEG18 can be set as a segment or as a common output driver for LCD panel
by options. COM2~COM0 are outputs for LCD panel plate.
SEG17~SEG0
O
LCD driver outputs for LCD panel segments
HT49R30A-1/HT49C30-1/HT49C30L
Rev. 1.10
4
September 25, 2002
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