參數(shù)資料
型號: HT48R05A-1
廠商: Holtek Semiconductor Inc.
英文描述: 8-Bit High Performance RISC-like OTP Microcontroller(8位、高性能、類似RISC、一次可編程微控制器,用于多I/O接口設(shè)備)
中文描述: 8位高性能RISC樣檢察官辦公室的微控制器(8位,高性能,類似的RISC,一次可編程微控制器,用于多的I / O接口設(shè)備)
文件頁數(shù): 26/44頁
文件大?。?/td> 290K
代理商: HT48R05A-1
Mnemonic
Description
Instruction
Cycle
Flag
Affected
Table Read
TABRDC [m]
TABRDL [m]
Read ROM code (current page) to data memory and
TBLH
ReadROMcode(lastpage)todatamemoryandTBLH
2
(1)
2
(1)
None
None
Miscellaneous
NOP
CLR [m]
SET [m]
CLR WDT
CLR WDT1
CLR WDT2
SWAP [m]
SWAPA [m]
HALT
No operation
Clear data memory
Set data memory
Clear Watchdog Timer
Pre-clear Watchdog Timer
Pre-clear Watchdog Timer
Swap nibbles of data memory
Swap nibbles of data memory with result in ACC
Enter power down mode
1
1
(1)
1
(1)
1
1
1
1
(1)
1
1
None
None
None
TO,PD
TO
(4)
,PD
(4)
TO
(4)
,PD
(4)
None
None
TO,PD
Note:
x: 8 bits immediate data
m: data memory address
A: accumulator
i: 0~7 number of bits
addr: program memory address
: Flag is affected
: Flag is not affected
(1)
:IfaloadingtothePCLregisteroccurs,theexecutioncycleofinstructionswillbedelayed
one more cycle (four system clocks).
(2)
:Ifaskippingtonextinstructionoccurs,theexecutioncycleofinstructionswillbedelayed
onemorecycle(foursystemclocks).Otherwisetheoriginalinstructioncycleisunchanged.
(3)
:
(1)
and
(2)
(4)
: The flags may be affected by the execution status. If the Watchdog Timer is cleared by
executingtheCLRWDT1orCLRWDT2instruction,theTOissetandthePDiscleared.
Otherwise the TO and PD flags remain unchanged.
HT48R05A-1
26
November 29, 2000
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