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參數(shù)資料
| 型號： | HT48C70-1 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | I/O Type 8-Bit MCU |
| 中文描述： | I / O型8位微控制器 |
| 文件頁數(shù)： | 9/40頁 |
| 文件大小： | 273K |
| 代理商： | HT48C70-1 |
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HT48R70A-1/HT48C70-1
Rev. 1.60
9
June 9, 2004
Program Memory
ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
8192 16bits,addressedbytheprogramcounterandta-
ble pointer.
Certain locations in the program memory are reserved
for special usage:
Location 000H
This area is reserved for program initialization. After
chip reset, the program always begins execution at lo-
cation 000H.
Location 004H
This area is reserved for the external interrupt service
program. If the INT interrupt pin is activated, the inter-
rupt enabled and the stack is not full, the program be-
gins execution at location 004H.
Location 008H
This area is reserved for the Timer/Event Counter 0 in-
terruptserviceprogram.Ifatimerinterruptresultsfroma
Timer/Event Counter 0 overflow, and if the interrupt is
enabled and the stack is not full, the program begins ex-
ecution at location 008H .
Location 00CH
This location is reserved for the Timer/Event Counter
1 interrupt service program. If a timer interrupt results
from a Timer/Event Counter 1 overflow, and the inter-
rupt is enabled and the stack is not full, the program
begins execution at location 00CH.
Table location
Any location in the program memory can be used as
look-up tables. The instructions TABRDC [m] (the
current page, one page=256 words) and TABRDL
[m]
lower-order byte to the specified data memory, and
the higher-order byte to TBLH (08H). The Table
Higher-order byte register (TBLH) is read only. The ta-
ble pointer (TBLP) is a read/write register (07H),
which indicates the table location. Before accessing
thetable,thelocationmustbeplacedintheTBLP.The
TBLH is read only and cannot be restored. If the main
(the last page) transfer the contents of the
routine and the ISR (Interrupt Service Routine) both
employ the table read instruction, the contents of the
TBLH in the main routine are likely to be changed by
the table read instruction used in the ISR. Errors can
occur. In other words, using the table read instruction
in the main routine and the ISR simultaneously should
be avoided. However, if the table read instruction has
to be applied in both the main routine and the ISR, the
interrupt is supposed to be disabled prior to the table
read instruction. It will not be enabled until the TBLH
has been backed up. All table related instructions re-
quire two cycles to complete the operation. These ar-
eas may function as normal program memory
depending upon the requirements.
Stack Register
STACK
This is a special part of the memory which is used to
save the contents of the program counter (PC) only. The
stackisorganizedinto16levelsandisneitherpartofthe
data nor part of the program space, and is neither read-
able nor writeable. The activated level is indexed by the
stack pointer (SP) and is neither readable nor writeable.
At a subroutine call or interrupt acknowledge signal, the
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Program Memory
Instruction
Table Location
*12
*11
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P12
P11
P10
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
1
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Table Location
Note: *12~*0: Table location bits
P12~P8: Current program counter bits
@7~@0: Table pointer bits
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HT48R70A-1 | I/O Type 8-Bit MCU |
| HT48C70 | 8-Bit Microcontroller Series |
| HT48CA0-2 | Remote Type 8-Bit MCU |
| HT48RA0 | Remote Type 8-Bit MCU |
| HT48RA0-2 | Remote Type 8-Bit MCU |
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參數(shù)描述 |
|---|---|
| HT48C75(40DIP-A0) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| HT48C75(40DIP-B0) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| HT48C75(64QFP-A0) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| HT48C75(64QFP-B0) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| HT48CA0 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:8-bit Microcontroller |
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