參數(shù)資料
型號(hào): HT46R65-56
廠商: Holtek Semiconductor Inc.
英文描述: A/D with LCD Type 8-Bit MCU
中文描述: 在A / D液晶型8位微控制器
文件頁數(shù): 21/48頁
文件大?。?/td> 409K
代理商: HT46R65-56
HT46R65/HT46C65
Rev. 1.80
21
July 14, 2005
PWM
The microcontroller provides 4 channels (6+2)/(7+1)
(dependent on options) bits PWM output shared with
PD0/PD1/PD2/PD3.ThePWMchannelshavetheirdata
registers denoted as PWM0 (1AH), PWM1 (1BH),
PWM2 (1CH) and PWM3 (1DH). The frequency source
of the PWM counter comes from f
SYS
. The PWM regis-
ters are four 8-bit registers. The waveforms of PWM out-
puts are as shown. Once the PD0/PD1/PD2/PD3 are
selected as the PWM outputs and the output function of
PD0/PD1/PD2/PD3 are enabled (PDC.0/PDC.1/
PDC.2/PDC.3= 0 ), writing 1 to PD0/PD1/PD2/PD3
data register will enable the PWM output function and
writing 0 will force the PD0/PD1/PD2/PD3 to stay at
0 .
A(6+2) bits mode PWM cycle is divided into four modu-
lation cycles (modulation cycle 0~modulation cycle 3).
Each modulation cycle has 64 PWM input clock period.
In a (6+2) bit PWM function, the contents of the PWM
register is divided into two groups. Group 1 of the PWM
register is denoted by DC which is the value of
PWM.7~PWM.2. The group 2 is denoted by AC which is
the value of PWM.1~PWM.0.
In a (6+2) bits mode PWM cycle, the duty cycle of each
modulation cycle is shown in the table.
Parameter
AC (0~3)
Duty Cycle
Modulation cycle i
(i=0~3)
i<AC
DC+1
64
i AC
DC
64
A (7+1) bits mode PWM cycle is divided into two modu-
lation cycles (modulation cycle0~modulation cycle 1).
Eachmodulationcyclehas128PWMinputclockperiod.
In a (7+1) bits PWM function, the contents of the PWM
register is divided into two groups. Group 1 of the PWM
register is denoted by DC which is the value of
PWM.7~PWM.1. The group 2 is denoted by AC which is
the value of PWM.0.
!
(6+2) PWM Mode
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(7+1) PWM Mode
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