HT46R46/HT46C46/HT46R47/HT46C47
Rev. 1.00
7
December 28, 2004
Program Memory
ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
1K 14bits,addressedbytheprogramcounterandtable
pointer.
Certain locations in the program memory are reserved
for special usage:
Location 000H
This area is reserved for program initialization. After
chip reset, the program always begins execution at lo-
cation 000H.
Location 004H
This area is reserved for the external interrupt service
program. If the INT input pin is activated, the interrupt
is enabledand the stack is not full, the program begins
execution at location 004H.
Location 008H
This area is reserved for the timer/event counter inter-
rupt service program. If a timer interrupt results from a
timer/event counter overflow, and if the interrupt is en-
abled and the stack is not full, the program begins exe-
cution at location 008H.
Location 00CH
This area is reserved for the A/D converter interrupt
service program. If an A/D converter interrupt results
from an end of A/D conversion, and if the interrupt is
enabled and the stack is not full, the program begins
execution at location 00CH.
Table location
Any location in the ROM space can be used as
look-up tables. The instructions TABRDC [m] (the
current page, 1 page=256 words) and TABRDL [m]
(the last page) transfer the contents of the lower-order
byte to the specified data memory, and the
higher-order byte to TBLH (08H). Only the destination
of the lower-order byte in the table is well-defined, the
other bits of the table word are transferred to the lower
portion of TBLH, and the remaining 2 bits are read as
0 . The Table Higher-order byte register (TBLH) is
read only. The table pointer (TBLP) is a read/write reg-
ister (07H), which indicates the table location. Before
accessing the table, the location must be placed in
TBLP. The TBLH is read only and cannot be restored.
If the main routine and the ISR (Interrupt Service Rou-
tine) both employ the table read instruction, the con-
tents of the TBLH in the main routine are likely to be
changed by the table read instruction used in the ISR.
> ! %
1 1
- -
$
3 ! "
! ! 0 ! @
!
;
0
>
!
!
3
>
!
'
= 2
> 0
9
5 A
& % :
'
= 2
> 0
9
5 A
& % :
B
% )
1
,
1 1 1
1 1
1 1 7
3
>
!
1 1
, - -
, 1 1
Program Memory for the HT46R46/HT46C46
Instruction
Table Location
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P10
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Table Location
Note:
*10~*0: Table location bits
@7~@0: Table pointer bits
For the HT46R47/HT46C47, the Table address location is 11 bits, i.e. from *10~*0.
For the HT46R46/HT46C46, the Table address location is 10 bits, i.e. from *9~*0.
P10~P8: Current program counter bits
> ! %
1 1
- -
$
3 ! "
! ! 0 ! @
!
;
0
>
!
!
3
>
!
'
= 2
> 0
9
5 A
& % :
'
= 2
> 0
9
5 A
& % :
B
% )
1
6
1 1 1
1 1
1 1 7
3
>
!
1 1
6 - -
6 1 1
Program Memory for the HT46R47/HT46C47