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參數(shù)資料
| 型號(hào)： | HT27LC010 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | CMOS 128K X 8-Bit OTP EPROM |
| 中文描述： | 的CMOS 128K的x 8位檢察官辦公室存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 6/15頁(yè) |
| 文件大?。?/td> | 172K |
| 代理商： | HT27LC010 |
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HT27LC010
Rev. 1.30
6
December 8, 2003
codes will possess odd parity, with the MSB (DQ7) de-
fined as the parity bit. When A1=V
IL
, the HT27LC010 will
read out the binary code of 7F, continuation code, to sig-
nify the unavailability of manufacturer ID codes.
Read Mode
TheHT27LC010hastwocontrolfunctions,bothofwhich
must be logically satisfied in order to obtain data at out-
puts.ChipEnable(CE)isthepowercontrolandshouldbe
usedfordeviceselection.OutputEnable(OE)istheout-
put control and should be used to gate data to the output
pins,independentofdeviceselection.Assumingthatad-
dressesarestable,addressaccesstime(t
ACC
)isequalto
the delay from CE to output (t
CE
). Data is available at the
outputs(t
OE
)afterthefallingedgeofOE,assumingtheCE
has been LOW and addresses have been stable for at
leastt
ACC
-t
OE
.
Standby Mode
The HT27LC010 has CMOS standby mode which re-
duces the maximum VCC current to 10 A. It is placed in
CMOS standby when CE is at V
CC
0.3V. The
HT27LC010 also has a TTL-standby mode which re-
duces the maximum VCC current to 0.6mA. It is placed
in TTL-standby when CE is at V
IH
. When in standby
mode, the outputs are in a high-impedance state, inde-
pendent of the OE input.
Two-line Output Control Function
To accommodate multiple memory connections, a
two-linecontrolfunctionisprovidedtoallowfor:
Low memory power dissipation
Assurance that output bus contention will not occur
It is recommended that CE be decoded and used as the
primary device-selection function, while OE be made a
common connection to the READ line from the system
control bus. This assures that all deselected memory
devices are in their low-power standby mode and that
the output pins are only active when data is desired from
a particular memory device.
System Considerations
During the switch between active and standby condi-
tions, transient current peaks are produced on the rising
and falling edges of Chip Enable. The magnitude of
these transient current peaks is dependent on the out-
put capacitance loading of the device. At a minimum, a
0.1 F ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
VCC and VPP to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM ar-
rays, a 4.7 F bulk electrolytic capacitor should be used
between VCC and VPP for each eight devices. The lo-
cation of the capacitor should be close to where the
power supply is connected to the array.
# #
# # &
9 :
9
;
&
9
<
Figure 1. A.C. Waveforms for Read Operation
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相關(guān)代理商/技術(shù)參數(shù) |
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| HT27LC010(32DIP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
| HT27LC010(32PLCC) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
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| HT27LC020-32DIP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
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