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參數(shù)資料
| 型號(hào)： | HT24LC02 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 2K-Bit 2-Wire Serial Interface CMOS Serial EEPROM(2K位、2線接口、 CMOS串行EEPROM) |
| 中文描述： | 的2K位2線串行接口的CMOS串行EEPROM（2K位，2線接口，串行EEPROM中的CMOS） |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 94K |
| 代理商： | HT24LC02 |
HT24LC02
5
November 16, 2000
The 8th bit of device address is the read/write
operation select bit. A read operation is initi-
ated if this bit is high and a write operation is
initiated if this bit is low.
If the comparison of the device address succeed
theEEPROMwilloutputazeroatACKbit.Ifnot,
the chip will return to a standby state.
Write operations
Byte write
A write operation requires an 8-bit data word
address following the device address word
and acknowledgment. Upon receipt of this ad-
dress, the EEPROM will again respond with a
zero and then clock in the first 8-bit data
word. After receiving the 8-bit data word, the
EEPROM will output a zero and the address-
ing device, such as a microcontroller, must
terminate the write sequence with a stop con-
dition. At this time the EEPROM enters an
internally-timed write cycle to the
non-volatile memory. All inputs are disabled
during this write cycle and EEPROM will not
respond until the write is completed (refer to
Byte write timing).
Page write
The 2K EEPROM is capable of an 8-byte page
write.
A page write is initiated the same as byte
write, but the microcontroller does not send a
stop condition after the first data word is
clocked in. Instead, after the EEPROM ac-
knowledges the receipt of the first data word,
the microcontroller can transmit up to seven
more data words. The EEPROM will respond
with a zero after each data word received. The
microcontroller must terminate the page
write sequence with a stop condition.
The data word address lower three (2K) bits
are internally incremented following the re-
ceipt of each data word. The higher data word
address bits are not incremented, retaining
the memory page row location (refer to Page
write timing).
Acknowledge polling
Since the device will not acknowledge during
a write cycle, this can be used to determine
whenthecycleiscomplete(thisfeaturecanbe
used to maximize bus throughput). Once the
stop condition for a write command has been
issued from the master, the device initiates
the internally timed write cycle. ACK polling
can be initiated immediately. This involves
the master sending a start condition followed
by the control byte for a write command
(R/W=0). If the device is still busy with the
write cycle, then no ACK will be returned. If
the cycle is completed, then the device will re-
turn the ACK and the master can then pro-
ceed with the next read or write command.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HT24LC02(8DIP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| HT24LC02(8SOP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| HT24LC02(8TSSOP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| HT24LC02(SOP) | 制造商:Holtek Semiconductor Inc 功能描述:CMOS 2K 2-WIRE SERIAL EEPROM, SO8 |
| HT24LC02_10 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CMOS 2K 2-Wire Serial EEPROM |
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