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參數(shù)資料
| 型號(hào)： | HT23B60 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 60x11 Pixel Data Bank 8-Bit Mask MCU |
| 中文描述： | 60x11像素?cái)?shù)據(jù)銀行8位微控制器面膜 |
| 文件頁數(shù)： | 23/50頁 |
| 文件大小： | 314K |
| 代理商： | HT23B60 |
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HT23B60
Rev. 1.10
23
March 1, 2004
TMR2L will keep the timer 2 preload register un-
changed.
Reading TMR2H will also latch the TMR2L into the low
byte buffer to avoid any false timing problem. Reading
TMR2L returns the contents of the low byte buffer. In
other words, the low byte of the timer counter 2 cannot
be read directly. It must read the TMR2H first to make
the low byte contents of Timer 2 be latched into the
buffer.
The TMR2C is the Timer 2 control register, which de-
fines the Timer 2 options. The timer counter control reg-
isters define the operating mode, counting enable or
disable and active edge.
If the timer counter starts counting, it will count from the
current contents in the timer counter to FFFFH. Once an
overflow occurs, the counter is reloaded from the timer
counter preload register and generates the correspond-
ing interrupt request flag (T2F; bit of INTC0) at the same
time.
To enable the counting operation, the Timer ON bit
(TON; bit 4 of TMR2C) should be set to 1. The overflow
of the timer counter is one of the wake-up sources. No
matter what the operation mode is, writing a 0 to ET0I
can disable the corresponding interrupt service.
In the case of timer counter OFF condition, writing data
to the timer counter preload register will also reload that
data to the timer counter. But if the timer counter is
turned on, data written to the timer counter will only be
kept in the timer counter preload register. The timer
counter will still operate until overflow occurs.
When the timer counter (reading TMR1H) is read, the
clock will be blocked to avoid errors. As this may result
in a counting error, this must be taken into consideration
by the programmer.
The Timer 2 can also be used as PFD output by setting
PWM1 and PWM2 to be PFD and PFDB output respec-
tively by 2FH.7 and 2FH.6. When the PFD/PFDB func-
tion is selected, setting 2FH.4/2FH.5 to 1 will enable
the PFD/PFDB output and setting 2FH.4/2FH.5 to 0
will disable the PFD/PFDB output.
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Register
Label
Bits
R/W
Function
PFDC
(2FH)
2~0
R
Unused bit, read as 0
TIM2
3
RW
1: The timer 2 frequency source is 3.58MHz/4
0: The timer 2 frequency source is 32768Hz
PFDB
4
RW
1: Enable PFDB
0: Disable PFDB
PFD
5
RW
1: Enable PFD
0: Disable PFD
PFDB/PWM1
6
RW
1: Enable PFDB
0: Enable PWM1
PFD/PWM2
7
RW
1: Enable PFD
0: Enable PWM2
PFDC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HT23B60-100QFP-A | 60x11 Pixel Data Bank 8-Bit Mask MCU |
| HT23C010 | CMOS 128K x 8-Bit Mask ROM(CMOS 128K x 8位掩模式ROM) |
| HT23C020 | CMOS 256K x 8-Bit Mask ROM(CMOS 256K x 8位掩模式ROM) |
| HT23C040 | CMOS 512K x 8-Bit Mask ROM(CMOS 512K x 8位掩模式ROM) |
| HT23C128 | CMOS 16Kx 8-Bit Mask ROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HT23B60-100QFP-A | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:60x11 Pixel Data Bank 8-Bit Mask MCU |
| HT23C010 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CMOS 128Kⅴ 8-Bit Mask ROM |
| HT23C020 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CMOS 256Kx 8-Bit Mask ROM |
| HT23C040 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CMOS 512Kx8-Bit Mask ROM |
| HT23C040H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS 512K?8-Bit High Speed Mask ROM |
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