參數(shù)資料
型號(hào): HT16270
廠商: Holtek Semiconductor Inc.
英文描述: RAM Mapping 64 x16 LCD Controller for I/O C
中文描述: 內(nèi)存映射64 x16 LCD控制器的I /業(yè)主立案法團(tuán)
文件頁(yè)數(shù): 8/17頁(yè)
文件大?。?/td> 151K
代理商: HT16270
HT1627
8
April 21, 2000
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RAM mapping
Functional Description
Display memory
RAM structure
The static display RAM is organized into 256*4
bits and stores the display data. The contents of
the RAM are directly mapped to the contents of
the LCD driver. Data in the RAM can be ac-
cessedbytheREAD,WRITEandREAD-MOD-
IFY-WRITE commands. The following is a map-
ping from the RAM to the LCD patterns.
Time base and Watchdog Timer
WDT
The time base generator and WDT share the
samedivided(/256)counter.TIMERDIS/EN/CLR
, WDT DIS/EN/CLR and IRQ EN/DIS are inde-
pendent from each other. Once the WDT
time-out occurs, the IRQ pin will remain at
logic low level until the CLR WDT or the IRQ
DIS command is issued.
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Figure 3
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