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參數(shù)資料
| 型號： | HSTL16918 |
| 英文描述： | 9-bit to 18-bit HSTL-to-LVTTL memory address latch |
| 中文描述： | 9位到18位HSTL到LVTTL內存地址鎖存 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大小： | 65K |
| 代理商： | HSTL16918 |
Philips Semiconductors
Product data
HSTL16918
9-bit to 18-bit HSTL-to-LVTTL memory address latch
2
2001 Jun 16
853-2258 26484
FEATURES
Inputs meet JEDEC HSTL Std. JESD 8–6, and outputs meet
Level III specifications
ESD classification testing is done to JEDEC Standard JESD22.
Protection exceeds 2000 V to HBM per method A114.
Latch-up testing is done to JEDEC Standard JESD78, which
exceeds 100 mA.
Packaged in 48-pin plastic thin shrink small outline package
(TSSOP48)
DESCRIPTION
The HSTL16918 is a 9-bit to 18-bit D-type latch designed for
3.15 to 3.45 V V
CC
operation. The D inputs accept HSTL levels and
the Q outputs provide LVTTL levels.
The HSTL16918 is particularly suitable for driving an address bus to
two banks of memory. Each bank of nine outputs is controlled with
its own latch-enable (LE) input.
Each of the nine D inputs is tied to the inputs of two D-type latches
that provide true data (Q) at the outputs. While LE is LOW the Q
outputs of the corresponding nine latches follow the D inputs. When
LE is taken HIGH, the Q outputs are latched at the levels set up at
the D inputs.
The HSTL16918 is characterized for operation from 0 to +70
°
C.
PIN CONFIGURATION
SW00768
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
2Q1
1Q1
GND
D1
D2
V
CC
D3
GND
1LE
GND
V
REF
GND
2LE
GND
D4
D5
D6
D7
V
CC
D8
GND
2Q7
1Q7
V
CC
2Q6
1Q6
GND
2Q5
1Q5
GND
2Q4
1Q4
V
CC
2Q3
1Q3
GND
2Q2
1Q2
V
CC
V
CC
21
22
23
24
25
26
27
28
D9
GND
2Q9
1Q9
V
CC
V
CC
2Q8
1Q8
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DWG NUMBER
48-pin plastic thin shrink small outline package
(TSSOP48)
0
to +70
°
C
HSTL16918DGG
SOT362-1
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HSTL16918DGG | 功能描述:閉鎖 9-18BT HSTL-LVTTL MEM DR LATCH RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| HSTL16918DGG,112 | 功能描述:閉鎖 DLatch 9Inputs LVTTL 3.3V 24mA RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| HSTL16918DGG,118 | 功能描述:閉鎖 DLatch 9Inputs LVTTL 3.3V 24mA RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| HSTL16918DGG,512 | 功能描述:閉鎖 9-18BT HSTL-LVTTL RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| HSTL16918DGG,518 | 功能描述:閉鎖 9-18BT HSTL-LVTTL RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
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