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參數(shù)資料
| 型號： | HSP50415 |
| 廠商： | Intersil Corporation |
| 英文描述： | Wideband Programmable Modulator(寬帶可編程調(diào)制器) |
| 中文描述： | 寬帶可編程調(diào)制器（寬帶可編程調(diào)制器） |
| 文件頁數(shù)： | 17/28頁 |
| 文件大?。?/td> | 173K |
| 代理商： | HSP50415 |
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3-17
access, then 72-bits of data must be loaded to the internal
memory buffer per memory address. This is accomplished
by performing three (3) 24-bit master to slave loads. Table 9
demonstrates the sequence of writes necessary to load
memory location 0 of the I and Q channel coefficient RAMs
simultaneously.
If auto-increment address mode had been enabled, then the
write to MasterReg<31:24> with the destination memory
address would not have been required, as writing to Control
Word 0 would reset the internal auto-increment address to 0.
Writing a 0x0F to address 4 generates an internal
memUpdate signal that loads the memory buffer from
MasterReg<23:0>. Which section of the memory buffer gets
the data is dependent on the memory word select counter
shown in column 7 of Table 9. A memUpdate strobe
increments the word select counter as well as updating the
memBuffer. When the word select counter is equal to 2 and
a memUpdate strobe occurs, memBuf<71:0> data is written
to memAddr<7:0> of the I/Q coefficient RAMs and the mem
word select counter is cleared ready for the next sequence of
writes to the memory buffer. Writing to the constellation map
RAM is much simpler as Table 10 demonstrates.
TABLE 9. EXAMPLE SEQUENCE OF WRITES TO LOAD I/Q COEFFICIENT RAM
ADDR<2:0>
CDATA<7:0>
CE
RD
WR
INTERNAL OPERATION
MEM WORD
SELECT<1:0>
0
0x0C
0
1
1
write to MasterReg<7:0>
xx
4
0x00
0
1
1
MasterReg<7:0> -> cntlWord0<7:0>
00
0
memData[0][7:0]
0
1
1
write to MasterReg<7:0>
00
1
memData[0][15:8]
0
1
1
write to MasterReg<15:8>
00
2
memData[0][23:16]
0
1
1
write to MasterReg<23:16>
00
4
0x0F
0
1
1
MasterReg<23:0> -> memBuf<23:0>
00
0
memData[0][31:24]
0
1
1
write to MasterReg<7:0>
01
1
memData[0][39:32]
0
1
1
write to MasterReg<15:8>
01
2
memData[0][47:40]
0
1
1
write to MasterReg<23:16>
01
4
0x0F
0
1
1
MasterReg<23:0> -> memBuf<47:24>
01
0
memData[0][55:48]
0
1
1
write to MasterReg<7:0>
10
1
memData[0][63:56]
0
1
1
write to MasterReg<15:8>
10
2
memData[0][71:64]
0
1
1
write to MasterReg<23:16>
10
3
0x00 (memAddr)
0
1
1
write to MasterReg<31:24>
10
4
0x0F
0
1
1
MasterReg<23:0> -> memBuf<71:48>
10
MasterReg<31:24> -> memAddr<7:0>
10
TABLE 10. EXAMPLE SEQUENCE OF WRITES TO LOAD CONSTELLATION MAP RAM
ADDR<2:0>
CDATA<7:0>
CE
RD
WR
INTERNAL OPERATION
MEM WORD
SELECT<1:0>
0
0x10
0
1
1
write to MasterReg<7:0>
xx
4
0x00
0
1
1
MasterReg<7:0> -> cntlWord0<7:0>
00
2
memData[0][7:0]
0
1
1
write to MasterReg<23:16>
00
3
0x00 (memAddr)
0
1
1
write to MasterReg<31:24>
00
4
0x0F
0
1
1
MasterReg<23:16> -> memBuf<71:64>
00
MasterReg<31:24> -> memAddr<7:0>
00
HSP50415
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HSP50415_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Wideband Programmable Modulator (WPM) |
| HSP50415EVAL1 | 功能描述:射頻開發(fā)工具 HSP50415VI EVAL BRD RoHS:否 制造商:Taiyo Yuden 產(chǎn)品:Wireless Modules 類型:Wireless Audio 工具用于評估:WYSAAVDX7 頻率: 工作電源電壓:3.4 V to 5.5 V |
| HSP50415VI | 功能描述:調(diào)節(jié)器/解調(diào)器 100MQFP, -40+85C,PROGRAMABLE MODULATOR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| HSP50415VIZ | 功能描述:調(diào)節(jié)器/解調(diào)器 W/ANL 100MQFP-40+85C PROGRAMABLE MODLTR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| HSP50A | 制造商:JLWORLD 制造商全稱:JLWORLD 功能描述:SPEAKER SOUND GENERATORS |
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