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參數(shù)資料
| 型號(hào)： | HS9-565BRH-Q |
| 廠商： | INTERSIL CORP |
| 元件分類： | DAC |
| 英文描述： | Radiation Hardened High Speed, Monolithic Digital-to-Analog Converter |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.5 us SETTLING TIME, 12-BIT DAC, CDFP24 |
| 封裝： | CERAMIC, DFP-24 |
| 文件頁(yè)數(shù)： | 6/7頁(yè) |
| 文件大?。?/td> | 169K |
| 代理商： | HS9-565BRH-Q |
6
Other Considerations
Grounds
The HS-565BRH has two ground terminals, pin 5 (REF GND)
and pin 12 (PWR GND). These should not be tied together
near the package unless that point is also the system signal
ground to which all returns are connected. (If such a point
exists, then separate paths are required to pins 5 and 12).
The current through pin 5 is near zero DC (Note); but pin 12
carries up to 1.75mA of code - dependent current from bits
1, 2, and 3. The general rule is to connect pin 5 directly to
the system “quiet” point, usually called signal or analog
ground. Connect pin 12 to the local digital or power ground.
Then, of course, a single path must connect the
analog/signal and digital/power grounds.
NOTE: Current cancellation is a two step process within the
HS-565BRH in which code dependent variations are eliminated, the
resulting DC current is supplied internally. First an auxiliary 9-bit
R-2R ladder is driven by the complement of the DACs input code.
Together, the main and auxiliary ladders draw a continuous 2.25mA
from the internal ground node, regardless of input code. Part of the
DC current is supplied by the zener voltage reference, and the
remainder is sourced from the positive supply via a current mirror
which is laser trimmed for zero current through the external terminal
(pin 5).
Layout
Connections to pin 9 (IOUT) on the HS-565BRH are most
critical for high speed performance. Output capacitance of the
DAC is only 20pF, so a small change of additional
capacitance may alter the op amp’s stability and affect settling
time. Connections to pin 9 should be short and few.
Component leads should be short on the side connecting to
pin 9 (as for feedback capacitor C). See the Settling Time
section.
Bypass Capacitors
Power supply bypass capacitors on the op amp will serve
the HS-565BRH also. If no op amp is used, a 0.01
μ
F
ceramic capacitor from each supply terminal to pin 12 is
sufficient, since supply current variations are small.
FIGURE 3A. .
FIGURE 3B.
VLSB
SUPPLY
0.1
μ
F
DVM
COMPARATOR
OUT
B
C
10
90
200K
+
-
5
9
10
NC
11
8
2.5K
5K
5K
20V
20%
BIAS
TURN ON
TURN OFF
9.95K
2mA
12
HS-565BRH
D
PULSE
GENERATOR
NO. 2
OUT
14
13
23
.
.
.
.
.
.
.
.
.
.
.
.
.
24
5V
P
PULSE
GENERATOR
NO. 1
SYNC
IN
TRIG
OUT
OUT
A
~100
kHz
STROBE IN
LSB
50%
DIGITAL
INPUT
DAC
OUTPUT
COMP.
STROBE
COMP.
OUT
“EQUAL BRIGHTNESS”
+3V
0V
0V
-400mV
(TURN OFF)
2V
0.8V
4V
0V
A
B
C
D
50%
tX
tD = COMPARATOR DELAY
SETTLING TIME
-0.50LSB
HS-565BRH
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