參數(shù)資料
型號: HS9-26CLV32RH-8
廠商: INTERSIL CORP
元件分類: 通用總線功能
英文描述: Radiation Hardened 3.3V Quad Differential Line Receiver
中文描述: QUAD LINE RECEIVER, CDFP16
封裝: CERAMIC, DFP-16
文件頁數(shù): 1/3頁
文件大?。?/td> 67K
代理商: HS9-26CLV32RH-8
1
TM
File Number
4907
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Intersil and Design is a trademark of Intersil Corporation.
Copyright Intersil Corporation 2000
HS-26CLV32RH
Radiation Hardened 3.3V Quad Differential
Line Receiver
The Intersil HS-26CLV32RH is a radiation hardened 3.3V
quad differential line receiver designed for digital data
transmission over balanced lines, in low voltage, RS-422
protocol applications. Radiation hardened CMOS processing
assures low power consumption, high speed, and reliable
operation in the most severe radiation environments.
The HS-26CLV32RH has an input sensitivity of 200mV (Typ)
over a common mode input voltage range of -4V to
+
7V. The
receivers are also equipped with input fail safe circuitry,
which causes the outputs to go to a logic “1” when the inputs
are open. The device has unique inputs that remain high
impedance when the receiver is disabled or powered-down,
maintaining signal integrity in multi-receiver applications.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-95689. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.asp
Logic Diagram
Features
Electrically Screened to SMD # 5962-95689
QML Qualified per MIL-PRF-38535 Requirements
1.2 Micron Radiation Hardened CMOS
- Total Dose. . . . . . . . . . . . . . . . . . . . . 300 krad(Si)(Max)
- Single Event Upset LET . . . . . . . . . . .100MeV/mg/cm
2
)
- Single Event Latch-up Immune
Low Stand-by Current. . . . . . . . . . . . . . . . . . . 13mA(Max)
Operating Supply Range . . . . . . . . . . . . . . . .3.0V to 3.6V
Enable Input Levels . . . . V
IH
> (.7)(V
DD
); V
IL
< (.3)(V
DD
)
CMOS Output Levels . . . . . . . . V
OH
> 2.55V; V
OL
< 0.4V
Input Fail Safe Circuitry
High Impedance Inputs when Disabled or Powered-down
Full -55
o
C to 125
o
C Military Temperature Range
Pinouts
HS1-26CLV32RH 16 LEAD CERAMIC SIDEBRAZE DIP
MIL-STD-1835: CDIP2-T16
TOP VIEW
HS9-26CLV32RH 16 LEAD FLATPACK
MIL-STD-1835: CDFP4-F16
TOP VIEW
Ordering Information
ORDERING NO.
INTERNAL MKT. NO.
TEMP.
RANGE
(
o
C)
5962F9568902QEC
HS1-26CLV32RH-8
-55 to 125
5962F9568902QXC
HS9-26CLV32RH-8
-55 to 125
5962F9568902V9A
HS0-26CLV32RH-Q
25
5962F9568902VEC
HS1-26CLV32RH-Q
-55 to 125
5962F9568902VXC
HS9-26CLV32RH-Q
-55 to 125
HS1-26CLV32RH/PROTO HS1-26CLV32RH/PROTO -55 to 125
HS9-26CLV32RH/PROTO HS9-26CLV32RH/PROTO -55 to 125
ENABLE
ENABLE
AOUT
BOUT
COUT
DIN
DOUT
DIN
CIN CIN
BIN BIN
AIN AIN
+
-
+
-
+
-
+
-
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
AIN
AIN
AOUT
ENABLE
COUT
CIN
GND
CIN
V
DD
BIN
BOUT
ENABLE
DOUT
DIN
DIN
BIN
AIN
AIN
AOUT
ENABLE
COUT
CIN
CIN
GND
2
3
4
5
6
7
8
1
16
15
14
13
12
11
10
9
V
DD
BIN
BIN
BOUT
ENABLE
DOUT
DIN
DIN
Data Sheet
August 2000
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