參數(shù)資料
型號: HN29W12814A
廠商: Hitachi,Ltd.
英文描述: 128M AND type Flash Memory(128M AND型閃速存儲器)
中文描述: 128M的AND型快閃記憶體(128兆及型閃速存儲器)
文件頁數(shù): 22/32頁
文件大?。?/td> 289K
代理商: HN29W12814A
HN29W12814A Series
22
Parameter
CDE
setup time for
WE
CDE
hold time for
WE
WE
to erase verify
CDE
setup time for SC
Symbol
Min
Typ
Max
Unit
Test conditions
Note
t
CDS
t
CDH
t
OEV
t
CDSS
t
RDY
t
CDCH
t
CDAC
t
CDF
0
ns
20
ns
20
μ
s
100
ns
Next cycle ready time
CDE
to
CE
,
OE
hold time
CDE
to output delay
CDE
to output invalid
Note:
1. t
DF
is a time after which the I/O pins become open.
0
ns
50
ns
50
ns
0
ns
Timing Waveforms
Power on and off Sequence
t
RES
t
RP
t
CES
t
BSY
t
CEH
t
CESR
t
RP
t
BSY
t
CES
t
CEH
t
RES
t
DFP
t
CWRH
t
CESR
t
CWRS
V
CC
CE
WE
RES
RDY
/
Busy
*
1
*
2
*
1
High-Z
Ready
Notes: 1.
RES
must be kept at the V
ILR
(V
SS
±
0.2 V) level referred to DC characteristics at the rising and falling
edges of V
CC
to guarantee data stored in the chip.
2.
RES
must be kept at the V
IHR
(V
CC
±
0.2 V) level referred to DC characteristics while I/O7 outputs the V
OL
level in the status data polling and RDY/
Busy
outputs the V
OL
level.
3. : Undefined
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