參數(shù)資料
型號: HMS81024E
廠商: Hynix Semiconductor Inc.
元件分類: 8位微控制器
英文描述: HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述: Hynix半導體公司的8位單芯片微控制器
文件頁數(shù): 52/77頁
文件大?。?/td> 1112K
代理商: HMS81024E
HMS81004E/08E/16E/24E/32E
JUNE 2001 Ver 1.00
49
14.3 Interrupt accept mode
The interrupt priority order is determined by bit (IM1,
IM0) of IMOD register. The condition allow for accepting
interrupt is set state of the interrupt mask enable flag and
the interrupt enable bit must be “1”. In Reset state, these
IP3 - IP0 registers become all “0”.
.
Figure 14-2 Interrupt Enable & Request Flag
0: Disable
1: Enable
VALUE
R/W
INITIAL VALUE: 000- 000-
B
ADDRESS: 0CE
H
IENH
INT1E
MSB
LSB
Timer2
T0E
T1E
INT2E
R/W
External interrupt 1
INITIAL VALUE: -00- ----
B
ADDRESS: 0CC
H
IENL
MSB
LSB
Timer1
R/W
R/W
R/W
R/W
Basic Interval Timer
Watchdog timer
External interrupt 2
Key scan
WDTE
R/W
R/W
-
-
-
-
-
BITE
-
-
-
KSCNE
T2E
Timer0
R/W
INITIAL VALUE: 000- 000-
B
ADDRESS: 0CF
H
IRQH
INT1R
MSB
LSB
Timer2
T0R
T1R
INT2R
R/W
External interrupt 1
INITIAL VALUE: -00- ----
B
ADDRESS: 0CD
H
IRQL
MSB
LSB
Timer1
R/W
R/W
R/W
R/W
Basic Interval Timer
Watchdog timer
External interrupt 2
Key scan
WDTR
R/W
R/W
-
-
-
-
-
BITR
-
-
-
KSCNR
T2R
Timer0
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