參數(shù)資料
型號： HMP8156ACNZ
廠商： Intersil
文件頁數(shù)： 20/34頁
文件大?。?/td> 0K
描述： IC VIDEO ENCODER NTSC/PAL 64MQFP
標(biāo)準(zhǔn)包裝： 84
類型： NTSC/PAL 編碼器
應(yīng)用： 多媒體，視頻編輯
電壓 - 電源，模擬： 4.75 V ~ 5.25 V
電壓 - 電源，數(shù)字： 4.75 V ~ 5.25 V
安裝類型： 表面貼裝
封裝/外殼： 64-BQFP
供應(yīng)商設(shè)備封裝： 64-MQFP（14x14）
包裝： 托盤
27
FN4343.5
August 20, 2009
External Voltage Reference
VREF = 1.230V (Figure 37), RSET = 140
Ω
--
±10
%
DAC to DAC Matching
--
5
%
VREF Output Voltage
Pin not driven, using internal reference
1.13
1.195
1.32
V
VREF Output Current
-50
-
50
μA
VREF Input Voltage
Pin connected to external reference shown in
Figure 37.
1.112
1.230
1.358
V
VREF Input Current
-500
-
500
μA
AC PARAMETERS, ANALOG OUTPUTS
Differential Gain Error
Using analog output filter shown in Figure 38A.
-
1
-
%
Differential Phase Error
-1
-
Degree
SNR (Weighted)
-70
-
dB
Hue Accuracy
-2
-
Degree
Color Saturation Accuracy
-2
-
%
Luminance Nonlinearity
-1
-
%
Residual Subcarrier
--60
-
dB
SCH Phase
SCH Phase Reset enabled
-
±1.5
-
Degree
Analog Output Skew, TASK
--
3
ns
Analog Output Delay, TAD
-
12
ns
DAC-DAC Crosstalk
--60
-
dB
Glitch Energy
Using analog output filter shown in Figure 38A.
Includes clock and data feedthrough
-35
-
pV-s
AC PARAMETERS, DIGITAL INPUTS AND OUTPUTS EXCEPT SCL AND SDA
Setup Time, TS
8-
-
ns
Hold Time, TH
0-
-
ns
CLK2 Frequency
-
30.0
MHz
CLK2 High Time, CLK2H
13.6
-
20.3
ns
CLK2 Low Time, CLK2L
13.6
-
20.3
ns
CLK2 to Output Delay, TD
2
-
12
ns
RESET* Pulse Width Low, TRES
4-
-
CLK
Cycles
AC PARAMETERS, SCL AND SDA (I2C INTERFACE)
All AC parameters meet the fast-mode I2C Bus Interface specification.
POWER SUPPLY CHARACTERISTICS
DAC PSRR at DC
Note 6
-
64
-
dB
Power Supply Range, VAA
4.75
5.0
5.25
V
Normal Supply Current, IAA
-
260
mA
Power-Down Supply Current, IAA
Note 5
-
750
μA
Power Dissipation
-
1100
1300
mW
NOTES:
4. Output level is dependent on the voltage on VREF, the value of RSET, and the load.
5. If using an external voltage reference, it is not powered down. The internal voltage reference is always powered down.
6. The supply voltage rejection is the relative variation of the full-scale output driving a 37.5
Ω load for a ±0.5% supply variation:
PSRR = 20 x log (
ΔV
AA/ ΔVOUT).
Electrical Specifications
VAA = +5V ±5%, RSET = 133Ω, VREF Unconnected, TA = 25
oC, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNITS
HMP8154, HMP8156A
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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HMP8156EVAL1 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Encoders
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HMP8170 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Video Encoder
HMP8170_03 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Video Encoder
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