參數(shù)資料
型號(hào)： HMP8154EVAL1
廠(chǎng)商： Intersil Corporation
英文描述： NTSC/PAL Encoders
中文描述： 的NTSC / PAL編碼器
文件頁(yè)數(shù)： 21/34頁(yè)
文件大?。?/td> 256K
代理商： HMP8154EVAL1
21
TABLE 19. CLOSED CAPTION_21A DATA REGISTER
SUB ADDRESS = 10
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 21 Caption
Data
(First Byte)
This register is cascaded with the closed caption_21B data register and they are read out se-
rially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A data
register is shifted out first.
80
H
TABLE 20. CLOSED CAPTION_21B DATA REGISTER
SUB ADDRESS = 11
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 21 Caption
Data
(Second Byte)
This register is cascaded with the closed caption_21A data register and they are read out se-
rially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A data
register is shifted out first.
80
H
TABLE 21. CLOSED CAPTION_284A DATA REGISTER
SUB ADDRESS = 12
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 284 Caption
Data
(First Byte)
This register is cascaded with the closed caption_284B data register and they are read out se-
rially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit D0 of the 284A
data register is shifted out first.
80
H
TABLE 22. CLOSED CAPTION_284B DATA REGISTER
SUB ADDRESS = 13
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 284 Caption
Data
(Second Byte)
This register is cascaded with the closed caption_284A data register and they are read out se-
rially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit D0 of the 284A
data register is shifted out first.
80
H
TABLE 23. START H_BLANK LOW REGISTER
SUB ADDRESS = 20
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Assert BLANK
Output Signal
(Horizontal)
This 8-bit register is cascaded with Start H_Blank High Register to form a 10-bit
start_horizontal_blank register. It specifies the horizontal count (in 1X clock cycles) at which
to start ignoring pixel data each scan line. The leading edge of HSYNC is count 020
H
. This
register is ignored unless BLANK is configured as an output.
4A
H
TABLE 24. START H_BLANK HIGH REGISTER
SUB ADDRESS = 21
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-2
Reserved
000000
B
1-0
Assert BLANK
Output Signal
(Horizontal)
This 2-bit register is cascaded with Start H_Blank Low Register to form a 10-bit
start_horizontal_blank register. It specifies the horizontal count (in 1x clock cycles) at which to
start ignoring pixel data each scan line. The leading edge of HSYNC is count 020
H
. This reg-
ister is ignored unless BLANK is configured as an output.
11
B
HMP8154, HMP8156A
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HMP8156 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:NTSC/PAL Encoder
HMP8156_03 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:NTSC/PAL Encoder
HMP8156A 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:NTSC/PAL Encoders
HMP8156ACN 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 64MQFP,0+70C NTSC/PAL VIDEO ENCODER RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線(xiàn)路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
HMP8156ACNZ 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 W/ANNEAL 64MQFP 0+70 ENCODER RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線(xiàn)路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
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