
HANBit                                      HMD4M32M8EG/8EAG
URL:www.hbe.co.kr
                                                                              HANBit Electronics Co.,Ltd. 
REV. 1.0(August. 2002)
Column address hold time 
t
CAH
8 
10 
ns 
Column address hold referenced to /RAS 
t
AR
40 
45 
ns 
Column Address to /RAS lead time 
t
RAL
25 
30 
ns 
Read command set-up time 
t
RCS
0 
0 
ns 
Read command hold referenced to /CAS 
t
RCH
0 
0 
ns 
Read command hold referenced to /RAS 
t
RRH
0 
0 
  ns 
Write command hold time 
t
WCH
10 
10 
ns 
Write command hold referenced to /RAS 
t
WCR
40 
45 
ns 
Write command pulse width 
t
WP
10 
10 
ns 
Write command to /RAS lead time 
t
RWL
13 
15 
ns 
Write command to /CAS lead time 
t
CWL
8 
10 
ns 
Data-in set-up time 
t
DS
0 
0 
ns 
Data-in hold time 
t
DH
8 
10 
ns 
Data-in hold referenced to /RAS 
t
DHR
40 
45 
ns 
Refresh period  
t
REF
32 
32 
ns 
Write command set-up time 
t
WCS
0 
0 
ns 
/CAS to /W delay time 
t
CWD
36 
40 
ns 
/RAS to /W delay time 
t
RWD
73 
85 
ns 
/CAS precharge(C-B-R counter test) 
t
CPT
20 
20 
ns 
Column address to /W delay time 
t
AWD
48 
55 
ns 
Access time from /CAS precharge 
t
CPA
30 
35 
ns 
/CAS precharge time (Hyper Page cycle) 
t
CP
8 
10 
ns 
/RAS pulse width (Hyper Page cycle) 
t
RASP
50 
200K 
60 
200K 
ns 
/WE to /RAS precharge time (C-B-R refresh) 
t
WRP
10 
10 
ns 
/WE to /RAS hold time (C-B-R refresh) 
NOTES 
1.
An initial pause of 200
μ
s is required after power-up followed by any 8 /RAS-only or /CAS-before-/RAS refresh cycles 
before proper device operation is achieved. 
2.
V
IH (min)
 and V
IL (max)
 are reference levels for measuring timing of input signals. Transition times are measured between 
V
IH(min)
 and V
IL(max)
 and are assumed to be 5ns for all inputs. 
3.
Measured with a load equivalent to 1TTL loads and 100pF 
4.
Operation within the t
RCD(max)
 limit insures that t
RAC(max)
 can be met. t
RCD(max)
 is specified as a reference point only. If t
RCD
is greater than the specified t
RCD(max)
 limit, then access time is controlled exclusively by t
CAC
. 
5.
Assumes that t
RCD
≥
 t
RCD(max)
6. t
, t
, t
 are referenced to t
7.This parameter defines the time at which the output achieves the open circuit condition and is not referenced to V
OH   
or V
OL
. 
8. t
WCS
, t
RWD
, t
CWD
 and t
AWD
 are non restrictive operating parameter. 
  They are included in the data sheet as electrical characteristic only. If t
≥
 the cycle is an early write    
  cycle and the data out pin will remain high impedance for the duration of the cycle. 
9. Either t
 or t
 must be satisfied for a read cycle. 
10. These parameters are referenced to the /CAS leading edge in early write cycles and to the /W leading edge in read- 
   write cycles. 
11. Operation within the t
 limit insures that t
RAC(max)
 can be met. t
 is specified as a reference  
   point only. If t
RAD
 is greater than the specified t
RAD(max)
 limit. then access time is controlled by t
AA
. 
t
WRH
10 
10 
ns