- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370641 > HMD4M144D9WG-6 (Hanbit Electronics Co.,Ltd.) 64Mbyte(4Mx144) 200-pin ECC Mode 4K Ref. DIMM Design 5V PDF資料下載
參數(shù)資料
| 型號(hào)： | HMD4M144D9WG-6 |
| 廠商： | Hanbit Electronics Co.,Ltd. |
| 英文描述： | 64Mbyte(4Mx144) 200-pin ECC Mode 4K Ref. DIMM Design 5V |
| 中文描述： | 64Mbyte（4Mx144）200針ECC的模式4K的參考。 5V的內(nèi)存設(shè)計(jì) |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 75K |
| 代理商： | HMD4M144D9WG-6 |
HANBit HMD4M144D9WG
URL:www.hbe.co.kr
- 7 -
HANBit Electronics Co.,Ltd.
REV.1.0.(August.2002)
/CAS hold time (C-B-R refresh)
t
CHR
15
15
ns
/RAS precharge to /CAS hold time
t
RPC
5
5
ns
Access time from /CAS precharge
t
CPA
35
40
ns
Fast page mode cycle time
t
PC
40
45
ns
/CAS precharge time (Fast page)
t
CP
10
10
ns
/RAS pulse width (Fast page )
t
RASP
60
100K
70
100K
ns
/W to /RAS precharge time (C-B-R refresh)
t
WRP
10
10
ns
/W to /RAS hold time (C-B-R refresh)
t
WRH
10
10
ns
/CAS precharge(C-B-R counter test)
t
CPT
20
30
ns
NOTES
1.
An initial pause of 200
μ
s is required after power-up followed by any 8 /RAS-only or /CAS-before-/RAS refresh cycles
before proper device operation is achieved.
2.
V
IH (min)
and V
IL (max)
are reference levels for measuring timing of input signals. Transition times are measured between
V
IH(min)
and V
IL(max)
and are assumed to be 5ns for all inputs.
3.
Measured with a load equivalent to 2TTL loads and 100pF
4.
Operation within the t
RCD(max)
limit insures that t
RAC(max)
can be met. t
RCD(max)
is specified as a reference point only. If t
RCD
is greater than the specified t
RCD(max)
limit, then access time is controlled exclusively by t
CAC
.
5.
Assumes that t
RCD
≥
t
RCD(max)
6. t
AR
, t
WCR
, t
DHR
are referenced to t
RAD(max)
7.This parameter defines the time at which the output achieves the open circuit condition and is not referenced to V
OH
or V
OL
.
8. t
WCS
, t
RWD
, t
CWD
anf t
AWD
are non restrictive operating parameter.
They are included in the data sheet as electrical characteristic only. If t
WCS
≥
tWCS(min)
the cycle is an early write
cycle and the data out pin will remain high impedance for the duration of the cycle.
9. Either t
RCH
or t
RRH
must be satisfied for a read cycle.
10. These parameters are referenced to the CAS leading edge in early write cycles and to the W leading edge in read-
write cycles.
11. Operation within the t
RAD(max)
limit insures that t
RAC(max)
can be met. t
RAD(max)
is specified as a reference
point only. If t
RAD
is greater than the specified t
RAD(max)
limit. then access time is controlled by t
AA
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HMD4M1Z1 | 4Mbit(4Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
| HMD4M1Z1-5 | 4Mbit(4Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
| HMD4M1Z1-6 | 4Mbit(4Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
| HMD4M32M2EG | 16Mbyte(4Mx32) 72-pin SIMM EDO Mode, 4K Refresh, 5V |
| HMD4M32M2EG-5 | 16Mbyte(4Mx32) 72-pin SIMM EDO Mode, 4K Refresh, 5V |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HMD4M1Z1 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:4Mbit(4Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
| HMD4M1Z1-5 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:4Mbit(4Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
| HMD4M1Z1-6 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:4Mbit(4Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
| HMD4M32M2EG | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:16Mbyte(4Mx32) 72-pin SIMM EDO Mode, 4K Refresh, 5V |
| HMD4M32M2EG-5 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:16Mbyte(4Mx32) 72-pin SIMM EDO Mode, 4K Refresh, 5V |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。