參數(shù)資料
型號: HM62W16256B
廠商: Hitachi,Ltd.
英文描述: 4 M SRAM (256-kword ×16-bit)(4 M 靜態(tài)RAM(256k字×16位))
中文描述: 四米的SRAM(256 - KWord的× 16位)(4個M靜態(tài)隨機(jī)存儲器(256k字× 16位))
文件頁數(shù): 17/17頁
文件大小: 79K
代理商: HM62W16256B
HM62W16256B Series
17
Revision Record
Rev. Date
Contents of Modification
Drawn by
Approved by
0.0
Jul. 9, 1998
Initial issue
M.Higuchi
K. Imato
0.1
Nov. 25, 1998 Change of format
Features
Change of Power dissipation
Active: 15 mW (typ) to TBD mW (typ)
Standby: 1.5
μ
W (typ) to TBD
μ
W (typ)
Change of Pin Arrangement (CSP)
Change of Block Diagram
DC Characteristics
I
CC2
typ: — mA to TBD mA
I
SB1
typ: —/—
μ
A to TBD/TBD
μ
A
I
max: 20/2
μ
A to 40/20
μ
A
AC Characteristics
t
BW
min: 50/60 ns to 50/55 ns
t
min: 50/55 ns to 40/50 ns
Low V
CC
Data Retention Characteristics
I
max: 10/1
μ
A to 20/10
μ
A
Change of note1 and 2
Change of Timing Waveform(1),(2) and (3)
M.Higuchi
K. Imato
1.0
Mar. 8, 1999
Deletion of HM62W16256BLBT Series (TBT-48)
Features: Change of Power dissipation
Active: TBD mW (typ) to 9.9 mW (typ)
Standby: TBD
μ
W (typ) to 3.3
μ
W (typ)
DC Characteristics
I
CC2
typ: TBD mA to 3 mA
I
typ: TBD/TBD
μ
A to 1/1
μ
A
AC Characteristics
t
max: 35/35 ns to 35/40 ns
Low V
CC
Data Retention Characteristics
I
CCDR
typ: —/—
μ
A to 0.8/0.8
μ
A
Oct. 14, 1999 Low V
Data Retention Characteristics
Change of Timing Waveform(1) and (3)
M.Higuchi
K. Makuta
2.0
相關(guān)PDF資料
PDF描述
HM62W16258BI 4 M SRAM (256-kword ×16-bit)(4 M 靜態(tài)RAM(256k字×16位))
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HM62W16258B 4 M SRAM (256-kword x 16-bit)
HM62W16258BLTT-5SL 4 M SRAM (256-kword x 16-bit)
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