參數(shù)資料
型號(hào): HM62256BLP-7
廠商: Hitachi,Ltd.
英文描述: 256k SRAM (32-kword x 8-bit)
中文描述: 256k的SRAM(32 KWord的× 8位)
文件頁(yè)數(shù): 7/20頁(yè)
文件大?。?/td> 154K
代理商: HM62256BLP-7
HM62256B Series
7
AC Characteristics
(Ta = 0 to +70
°
C, V
CC
= 5.0 V
±
10%)
Test Conditions
Input pulse levels: 0.8 V to 2.4 V
Input rise and fall time: 5 ns
Input and output timing reference levels: 1.5 V
Output load: 1 TTL Gate + C
L
(50 pF) (HM62256B-5)
1 TTL Gate + C
L
(100 pF) (HM62256B-7/8)
(Including scope & jig)
Read Cycle
HM62256B
-5
-7
-8
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Unit
Notes
Read cycle time
t
RC
t
AA
t
ACS
t
OE
t
CLZ
t
OLZ
t
CHZ
t
OHZ
t
OH
55
70
85
ns
Address access time
55
70
85
ns
Chip select to access time
55
70
85
ns
Output enable to output valid
35
40
45
ns
Chip select to output in low-Z
5
10
10
ns
2
Output enable to output in low-Z
5
5
5
ns
2
Chip deselect to output in high-Z
0
20
0
25
0
30
ns
1, 2
Output disable to output in high-Z
0
20
0
25
0
30
ns
1, 2
Output hold from address change
5
5
5
ns
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