參數(shù)資料
型號(hào): HM6216255HCJP-10
廠(chǎng)商: Hitachi,Ltd.
英文描述: Aluminum Electrolytic Radial Leaded General Purpose Capacitor; Capacitance: 330uF; Voltage: 35V; Case Size: 10x12.5 mm; Packaging: Bulk
中文描述: 4分高速SRAM(256 - KWord的x 16位)
文件頁(yè)數(shù): 8/17頁(yè)
文件大?。?/td> 95K
代理商: HM6216255HCJP-10
HM6216255HC Series
8
Write Cycle
HM6216255HC
-10
Parameter
Symbol
Min
Max
Unit
Notes
Write cycle time
t
WC
t
AW
t
CW
t
WP
t
LBW
, t
UBW
t
AS
t
WR
t
DW
t
DH
t
OW
t
OHZ
t
WHZ
10
ns
Address valid to end of write
7
ns
Chip select to end of write
7
ns
8
Write pulse width
7
ns
7
Byte select to end of write
7
ns
9, 10
Address setup time
0
ns
5
Write recovery time
0
ns
6
Data to write time overlap
5
ns
Data hold from write time
0
ns
Write disable to output in low-Z
3
ns
1
Output disable to output in high-Z
5
ns
1
Write enable to output in high-Z
Notes: 1. Transition is measured
±
200 mV from steady voltage with Load (B). This parameter is sampled
and not 100% tested.
2. If the
CS
or
LB
or
UB
low transition occurs simultaneously with the
WE
low transition or after the
WE
transition, output remains a high impedance state.
3.
WE
and/or
CS
must be high during address transition time.
4. If
CS
,
OE
,
LB
and
UB
are low during this period, I/O pins are in the output state. Then the data
input signals of opposite phase to the outputs must not be applied to them.
5. t
AS
is measured from the latest address transition to the latest of
CS
,
WE
,
LB
or
UB
going low.
6. t
WR
is measured from the earliest of
CS
,
WE
,
LB
or
UB
going high to the first address transition.
7. A write occurs during the overlap of low
CS
, low
WE
and low
LB
or low
UB
.
8. t
CW
is measured from the later of
CS
going low to the end of write.
9. t
LBW
is measured from the later of
LB
going low to the end of write.
10.t
UBW
is measured from the later of
UB
going low to the end of write.
5
ns
1
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