參數(shù)資料
型號: HM5164805FL
廠商: Hitachi,Ltd.
英文描述: 64 MEDO DRAM (8-Mword X 8-bit) 8 k Refresh/4 k Refresh
中文描述: 64目等內(nèi)存(8 Mword × 8位)8畝刷新/ 4畝刷新
文件頁數(shù): 7/35頁
文件大小: 490K
代理商: HM5164805FL
HM5164805F Series, HM5165805F Series
7
Operation Table
RAS
CAS
WE
OE
I/O 0 to I/O 7
Operation
H
×
×
×
High-Z
Standby
L
L
H
L
Dout
Read cycle
L
L
L*
2
×
Din
Early write cycle
L
L
L*
2
H
Din
Delayed write cycle
L
L
H to L
L to H
Dout/Din
Read-modify-write cycle
RAS
-only refresh cycle
CAS
-before-
RAS
refresh cycle or
Self refresh cycle (L-version)
L
H
×
×
×
High-Z
H to L
L
H
High-Z
L
Notes: 1. H: V
IH
(inactive), L: V
IL
(active),
×
: V
IH
or V
IL
2. t
WCS
0 ns: Early write cycle
t
WCS
< 0 ns: Delayed write cycle
L
H
H
High-Z
Read cycle (Output disabled)
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Terminal voltage on any pin relative to V
SS
Power supply voltage relative to V
SS
Short circuit output current
V
T
V
CC
Iout
–0.5 to V
CC
+ 0.5 (
4.6 V (max))
–0.5 to +4.6
V
V
50
mA
Power dissipation
P
T
Tstg
1.0
W
Storage temperature
–55 to +125
°
C
DC Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Notes
Supply voltage
V
CC
V
SS
V
IH
V
IL
Ta
3.0
3.3
3.6
V
1, 2
0
0
0
V
2
Input high voltage
2.0
V
CC
+ 0.3
0.8
V
1
Input low voltage
–0.3
V
1
Ambient temperature range
Notes: 1. All voltage referred to V
SS
.
2. The supply voltage with all V
pins must be on the same level. The supply voltage with all V
SS
pins must be on the same level.
0
70
C
相關(guān)PDF資料
PDF描述
HM5164805FLJ 64 MEDO DRAM (8-Mword X 8-bit) 8 k Refresh/4 k Refresh
HM5164805FLTT 64 MEDO DRAM (8-Mword X 8-bit) 8 k Refresh/4 k Refresh
HM5164805FLTT-6 64 MEDO DRAM (8-Mword X 8-bit) 8 k Refresh/4 k Refresh
HM5164805FTT 64 MEDO DRAM (8-Mword X 8-bit) 8 k Refresh/4 k Refresh
HM5165805FTT 64 MEDO DRAM (8-Mword X 8-bit) 8 k Refresh/4 k Refresh
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