參數(shù)資料
型號： HM-6518883
廠商： Intersil Corporation
英文描述： 1024 x 1 CMOS RAM
中文描述： 1024 × 1 CMOS存儲器
文件頁數(shù)： 4/9頁
文件大?。?/td> 220K
代理商： HM-6518883
6-88
TABLE 2. HM-6518/883 AC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
PARAMETER
SYMBOL
(NOTES 1, 2)
CONDITIONS
GROUP A
SUB-
GROUPS
TEMPERATURE
LIMITS
UNITS
HM-6518B/883
HM-6518/883
MIN
MAX
MIN
MAX
Chip Enable
Access Time
(1) TELQV
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
-
180
-
250
ns
Address Access
Time
(2) TAVQV
VCC = 4.5 and
5.5V, Note 3
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
-
180
-
250
ns
Chip Select
Output Enable
Time
(3) TSLQX
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
5
-
5
-
ns
Write Enable
Output Disable
Time
(4) TWLQZ
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
-
120
-
160
ns
Chip Select
Output Disable
Time
(5) TSHQZ
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
-
120
-
160
ns
Chip Enable Pulse
Negative Width
(6) TELEH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
180
-
250
-
ns
Chip Enable Pulse
Positive Width
(7) TEHEL
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
100
-
100
-
ns
Address Setup
Time
(8) TAVEL
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
0
-
0
-
ns
Address Hold Time
(9) TELAX
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
40
-
50
-
ns
Data Setup Time
(10) TDVWH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
80
-
110
-
ns
Data Hold Time
(11) TWHDX
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
0
-
0
-
ns
Chip Select Write
Pulse Setup Time
(12) TWLSH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
100
-
130
-
ns
Chip Enable Write
Pulse Setup Time
(13) TWLEH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
100
-
130
-
ns
Chip Select Write
Pulse Hold Time
(14) TSLWH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
100
-
130
-
ns
Chip Enable Write
Pulse Hold Time
(15) TELWH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
100
-
130
-
ns
Write Enable Pulse
Width
(16) TWLWH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
100
-
130
-
ns
Read or Write
Cycle Time
(17) TELEL
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
280
-
350
-
ns
NOTES:
1. All voltages referenced to device GND.
2. Input pulse levels: 0.8V to VCC -2.0V; input rise and fall times: 5ns (max); input and output timing reference level: 1.5V; output load:
-1TTL gate equivalent, CL = 50pF (min) - for CL greater than 50pF, access time is derated by 0.15ns per pF.
3. TAVQV = TELQV + TAVEL.
HM-6518/883
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