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參數(shù)資料
| 型號(hào)： | HIP9020AB |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | Programmable Quad Buffer with Pre and Post Scaler Dividers |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO20 |
| 文件頁(yè)數(shù)： | 2/4頁(yè) |
| 文件大?。?/td> | 23K |
| 代理商： | HIP9020AB |
10-55
Programmable Quad Buffer Functional Block Diagram
LOGIC SELECT FOR INPUT (SSI) TO OUTPUT (VOX) DIV-BY NUMBER
PRSS-A
PRSS-B
PRSS-C
VO1, VO2, VO3
(POSS HIGH)
DIV-BY
VO4
(POSS HIGH)
DIV-BY
VO1, VO2
(POSS LOW)
DIV-BY
VO3, VO4
(POSS LOW)
DIV-BY
0
0
0
2
1
2
1
0
0
1
12
6
12
6
0
1
0
14
7
14
7
0
1
1
16
8
16
8
1
0
0
18
9
18
9
1
0
1
20
10
20
10
1
1
0
22
11
22
11
DRIVER
(V, I PROT)
LIMITER
SQ. AMP
WITHHYS.
FREQ
DOUBLER
BUFFER
DIV BY 2
DIV BY 2
VOLT. REG. &
CURRENT
SOURCE
PRESCALER
DIV-BY
1 AND 6 - 11
14
12
11
9
17
20
16
15
4
2
6
10
PRSO
VO1
VO2
VO3
VO4
(POST SCALER SELECT)
V
CC
GND
SSI
(BUFFER OUTPUT)
POSI
(PRESCALER SELECT)
A
B
DRIVER
(V, IPROT)
DRIVER
(V, IPROT)
DRIVER
(V, IPROT)
Q1
Q1
(SPEED SENSOR INPUT)
(POST SCALER INPUT)
POSS
PRSS
(PRESCALER OUTPUT)
OUTPUTS
C
EACH OUTPUT
PROTECTED BY A
COLLECTOR-TO-BASE
ZENER DIODE CLAMP
20
30V
4
7
1
2
3
11
12
13
6
14
5
10
9
8
CIRCLED NUMBERS ARE 20 LEAD SOP PACKAGE
VOX
BUF
Q4
5
1
HIP9020
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