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4-3
Absolute Maximum Ratings
Thermal Information
DC Logic Supply, V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7.0V
Output Voltage, V
O
. . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7.0V
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V Max
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 125
o
C
Thermal Resistance (Typical, Note 1)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Power Dissipation, P
D
For T
A
= -40
o
C to 70
o
C . . . . . . . . . . . . . . . . . . . . . . .400mW Max
For T
A
= 70
o
C to 125
o
C, Derate Linearly at . . . . . . . . . . 6mW/
o
C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature Range, T
STG
. . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
At a Distance 1/16
±
1/32 inch, (1.59
±
0.79mm) from Case for
10s Max. (SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
120
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V
DD
= 5V
±
5%, GND = 0V, Clock Frequency 4MHz
±
0.1%, T
A
= -40
o
C to 125
o
C,
Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DC ELECTRICAL SPECIFICATIONS
Quiescent Supply Current
I
DD
V
DD
= 5.25V, GND = 0V
-
5.0
8.0
mA
Midpoint Voltage, Pin 3
V
MID
V
DD
= 5.0V, I
L
= 2mA Source
2.3
2.45
2.55
V
Midpoint Voltage, Pin 3
V
MID
V
DD
= 5.0V, I
L
= 0mA
2.4
2.5
2.6
V
Low Input Voltage, Pins INT/HOLD, CS, SI, SCK
V
IL
-
-
30
% of V
DD
High Input Voltage, Pins INT/HOLD, CS, SI, SCK
V
IH
70
-
-
% of V
DD
Hysteresis voltage, Pins INT/HOLD, CS, SI, SCK
V
HYST
0.85
-
-
V
Internal Pull-Up Current
I Source CS, SI,
SCK, TEST
V
DD
= 5.0V, Measured at GND
-
50
-
μ
A
Internal Pull-Down Current
I Sink,
INT/HOLD
V
DD
= 5.0V, Measured at V
DD
-
-50
-
μ
A
Low Level Output, Pin SO
V
OL
I
SOURCE
= 1.6mA, V
DD
= 5.0V
0.01
-
0.30
V
High Level Output, Pin SO
V
OH
I
SINK
= 200
μ
A, V
DD
= 5.0V
4.8
4.9
5.0
V
Three-State Leakage Pin SO
I
L
Measured at GND; V
DD
= 5.0V
-
-
±
10
μ
A
Low Level Output, Pin 10, OSCOUT
V
OL
I
SOURCE
= 500
μ
A; V
DD
= 5.0V
-
-
1.5
V
High Level Output, Pin 10, OSCOUT
V
OH
I
SINK
= -500
μ
A; V
DD
= 5.0V
4.4
-
-
V
SPI BUS INTERFACE
AC Parametrics
CS Falling to SCLK Rising
t
CCH
10
-
-
ns
CS Rising to SCLK Falling
t
CCL
80
-
-
ns
SCLK Low
t
PWL
60
-
-
ns
SCLK High
t
PWH
60
-
-
ns
SCLK Falling to CS Rising
t
SCCH
60
-
-
ns
Data High Setup Time
t
SUH
20
-
-
ns
Data Low Setup Time
t
SUL
20
-
-
ns
Data High Hold Time
t
HH
10
-
-
ns
Data Low Hold Time
t
HL
10
-
-
ns
Min Time Between 2 Programmed Words
t
CSH
200
-
-
ns
CS Rising to INT/Hold Rising
t
CIH
8
-
-
μ
s
HIP9011