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參數資料
| 型號： | HIP6603A |
| 廠商： | Intersil Corporation |
| 英文描述： | Synchronous-Rectified Buck MOSFET Drivers(同步整流的MOSFET驅動器) |
| 中文描述： | 同步整流降壓MOSFET驅動器（同步整流的MOSFET的驅動器） |
| 文件頁數： | 4/9頁 |
| 文件大?。?/td> | 101K |
| 代理商： | HIP6603A |
4
Functional Pin Description
UGATE (Pin 1)
Upper gate drive output. Connect to gate of high-side power
N-Channel MOSFET.
BOOT (Pin 2)
Floating bootstrap supply pin for the upper gate drive.
Connect the bootstrap capacitor between this pin and the
PHASE pin. The bootstrap capacitor provides the charge to
turn on the upper MOSFET. See the Internal Bootstrap
Device section under DESCRIPTION for guidance in
choosing the appropriate capacitor value.
PWM (Pin 3)
The PWM signal is the control input for the driver. The PWM
signal can enter three distinct states during operation, see the
three-statePWMInputsectionunderDESCRIPTIONforfurther
details. Connect this pin to the PWM output of the controller.
GND (Pin 4)
Bias and reference ground. All signals are referenced to this
node.
LGATE (Pin 5)
Lower gate drive output. Connect to gate of the low-side
power N-Channel MOSFET.
VCC (Pin 6)
Connect this pin to a +12V bias supply. Place a high quality
bypass capacitor from this pin to GND.
PVCC (Pin 7)
For the HIP6601A, this pin supplies the upper gate drive
bias. Connect this pin from +12V down to +5V.
For the HIP6603A, this pin supplies both the upper and
lower gate drive bias. Connect this pin to either +12V or +5V.
PHASE (Pin 8)
Connect this pin to the source of the upper MOSFET and the
drain of the lower MOSFET. The PHASE voltage is
monitored for adaptive shoot-through protection. This pin
also provides a return path for the upper gate drive.
Description
Operation
Designed for versatility and speed, the HIP6601A and
HIP6603A dual MOSFET drivers control both high-side and
low-side N-Channel FETs from one externally provided PWM
signal.
The upper and lower gates are held low until the driver is
initialized. Once the VCC voltage surpasses the VCC Rising
Threshold (See Electrical Specifications), the PWM signal
takes control of gate transitions. A rising edge on PWM
initiates the turn-off of the lower MOSFET (see Timing
Diagram). After a short propagation delay [t
PDLLGATE
], the
lower gate begins to fall. Typical fall times [t
FLGATE
] are
provided in the Electrical Specifications section. Adaptive
shoot-through circuitry monitors the LGATE voltage and
determines the upper gate delay time [t
PDHUGATE
] based
on how quickly the LGATE voltage drops below 2.2V. This
prevents both the lower and upper MOSFETs from
conducting simultaneously or shoot-through. Once this delay
period is complete the upper gate drive begins to rise
[t
RUGATE
] and the upper MOSFET turns on.
Timing Diagram
PWM
UGATE
LGATE
t
PDLLGATE
t
FLGATE
t
PDHUGATE
t
RUGATE
t
PDLUGATE
t
FUGATE
t
PDHLGATE
t
RLGATE
HIP6601A, HIP6603A
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HIP6603ACB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HIP6603ACB-T | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Synchronous Rectified Buck MOSFET Drivers |
| HIP6603B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Synchronous Rectified Buck MOSFET Drivers |
| HIP6603BCB | 功能描述:IC DRIVER MOSFET SYNC BUCK 8SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - MOSFET，電橋驅動器 - 外部開關 系列:- 標準包裝:50 系列:- 配置:低端 輸入類型:非反相 延遲時間:40ns 電流 - 峰:9A 配置數:1 輸出數:1 高端電壓 - 最大（自引導啟動）:- 電源電壓:4.5 V ~ 35 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:TO-263-6，D²Pak（5 引線+接片），TO-263BA 供應商設備封裝:TO-263 包裝:管件 |
| HIP6603BCB-T | 功能描述:IC DRIVER MOSFET SYNC BUCK 8SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - MOSFET，電橋驅動器 - 外部開關 系列:- 標準包裝:50 系列:- 配置:低端 輸入類型:非反相 延遲時間:40ns 電流 - 峰:9A 配置數:1 輸出數:1 高端電壓 - 最大（自引導啟動）:- 電源電壓:4.5 V ~ 35 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:TO-263-6，D²Pak（5 引線+接片），TO-263BA 供應商設備封裝:TO-263 包裝:管件 |
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