參數(shù)資料
型號(hào): HIP6311CBZA
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller
中文描述: SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO20
封裝: LEAD FREE, PLASTIC, MS-013-AC, SOIC-20
文件頁(yè)數(shù): 10/17頁(yè)
文件大?。?/td> 449K
代理商: HIP6311CBZA
10
FN4817.3
December 27, 2004
back through the lower MOSFETs, avoiding a possibly
destructive ringing of the capacitors and output inductors. If
the conditions that caused the over-voltage still persist, the
PWM outputs will be cycled between three state and V
CORE
clamped to ground, as a hysteretic shunt regulator.
Under-Voltage
The VSEN pin also detects when the CORE voltage falls more
than 10% below the VID programmed level. This causes
PGOOD to go low, but has no other effect on operation and is
not latched. There is also hysteresis in this detection point.
Over-Current
In the event of an over-current condition, the over-current
protection circuit reduces the average current delivered to
less than 25% of the current limit. When an over-current
condition is detected, the controller forces all PWM outputs
into a three state mode. This condition results in the gate
driver removing drive to the output stages.The HIP6311 goes
into a wait delay timing cycle that is equal to the Soft-Start
ramp time. PGOOD also goes “l(fā)ow” during this time due to
VSEN going below its threshold voltage.To lower the
average output dissipation, the Soft-Start initial wait time is
increased from 32 to 2048 cycles, then the Soft-Start ramp is
initiated. At a PWM frequency of 200kHz, for instance, an
over-current detection would cause a dead time of 10.24ms,
then a ramp of 10.08ms.
At the end of the delay, PWM outputs are restarted and the
Soft-Start ramp is initiated. If a short is present at that time,
the cycle is repeated. This is the hiccup mode.
Figure 6 shows the supply shorted under operation and the
hiccup operating mode described above. Note that due to
the high short circuit current, over-current is detected before
completion of the start-up sequence so the delay is not quite
as long as the normal Soft-Start cycle.
CORE Voltage Programming
The voltage identification pins (VID0, VID1, VID3, and VID4)
set the CORE output voltage. Each VID pin is pulled to V
CC
by an internal 20
μ
A current source and accepts open-
collector/open-drain/open-switch-to-ground or standard low-
voltage TTL or CMOS signals.
Table 1 shows the nominal DAC voltage as a function of the
VID codes. The power supply system is
±
0.8% accurate over
the operating temperature and voltage range.
PGOOD
SHORT
CURRENT
50A/Div
ATX SUPPLY ACTIVATED BY ATX “PS-ON PIN”
SUPPLY FREQUENCY = 200kHz, V
IN
= 12V
HICCUP MODE. SUPPLY POWERED BY ATX SUPPLY
CORE LOAD CURRENT = 31A, 5V LOAD = 5A
SHORT APPLIED HERE
FIGURE 6. SHORT APPLIED TO SUPPLY AFTER POWER-UP
TABLE 1. VOLTAGE IDENTIFICATION CODES
VID4
VID3
VID2
VID1
VID0
VDAC
1
1
1
1
1
Off
1
1
1
1
0
1.100
1
1
1
0
1
1.125
1
1
1
0
0
1.150
1
1
0
1
1
1.175
1
1
0
1
0
1.200
1
1
0
0
1
1.225
1
1
0
0
0
1.250
1
0
1
1
1
1.275
1
0
1
1
0
1.300
1
0
1
0
1
1.325
1
0
1
0
0
1.350
1
0
0
1
1
1.375
1
0
0
1
0
1.400
1
0
0
0
1
1.425
1
0
0
0
0
1.450
0
1
1
1
1
1.475
0
1
1
1
0
1.500
0
1
1
0
1
1.525
0
1
1
0
0
1.550
0
1
0
1
1
1.575
0
1
0
1
0
1.600
0
1
0
0
1
1.625
0
1
0
0
0
1.650
0
0
1
1
1
1.675
0
0
1
1
0
1.700
0
0
1
0
1
1.725
0
0
1
0
0
1.750
0
0
0
1
1
1.775
0
0
0
1
0
1.800
0
0
0
0
1
1.825
0
0
0
0
0
1.850
HIP6311
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