參數(shù)資料
型號: HIP6311CB
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: 150000 SYSTEM GATE 2.5 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
中文描述: SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO20
封裝: PLASTIC, MS-013-AC, SOIC-20
文件頁數(shù): 13/17頁
文件大小: 195K
代理商: HIP6311CB
13
average current per phase. Neglecting secondary effects,
the sampled current (I
SAMPLE
) can be related to the load
current (I
LT
) by:
I
SAMPLE
=
I
LT
/ n +
(V
IN
V
CORE
- 3V
CORE2
) / (6L x F
SW
x
V
IN
)
Where: I
LT
= total load current
n = the number of channels
Example: Using the previously given conditions, and
For I
LT
= 100A,
n = 4
Then I
SAMPLE
= 25.49A
As discussed previously, the voltage drop across each Q2
transistor at the point in time when current is sampled is
r
DSON
(Q2) x I
SAMPLE
. The voltage at Q2’s drain, the
PHASE node, is applied through the R
ISEN
resistor to the
HIP6311 ISEN pin. This pin is held at virtual ground, so the
current into ISEN is:
I
SENSE
= I
SAMPLE
x r
DS(ON)
(Q2) / R
ISEN
.
R
Isen
= I
SAMPLE
x r
DS(ON)
(Q2) / 50
μ
A
Example: From the previous conditions,
where I
LT
= 100A,
I
SAMPLE
= 25.49A,
r
DS(ON)
(Q2)
= 4m
Then: R
ISEN
= 2.04K and
I
CURRENT TRIP
= 165%
Short circuit I
LT
= 165A.
Channel Frequency Oscillator
The channel oscillator frequency is set by placing a resistor,
R
T
, to ground from the FS/DIS pin. Figure 10 is a curve
showing the relationship between frequency, F
SW
, and
resistor R
T
. To avoid pickup by the FS/DIS pin, it is important
to place this resistor next to the pin. If this pin is also used to
disable the converter, it is also important to locate the pull-
down device next to this pin.
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting
impedances and parasitic circuit elements. These voltage
spikes can degrade efficiency, radiate noise into the circuit
and lead to device over-voltage stress. Careful component
layout and printed circuit design minimizes the voltage
spikes in the converter. Consider, as an example, the turnoff
transition of the upper PWM MOSFET. Prior to turnoff, the
upper MOSFET was carrying channel current. During the
turnoff, current stops flowing in the upper MOSFET and is
picked up by the lower MOSFET. Any inductance in the
switched current path generates a large voltage spike during
the switching interval. Careful component selection, tight
layout of the critical components, and short, wide circuit
traces minimize the magnitude of voltage spikes. Contact
Intersil
for evaluation board drawings of the component
placement and printed circuit board.
There are two sets of critical components in a DC-DC
converter using a HIP6311 controller and a HIP6601 gate
driver. The power components are the most critical because
they switch large amounts of energy. Next are small signal
components that connect to sensitive nodes or supply
critical bypassing current and signal coupling.
The power components should be placed first. Locate the
input capacitors close to the power switches. Minimize the
length of the connections between the input capacitors, C
IN
,
and the power switches. Locate the output inductors and
output capacitors between the MOSFETs and the load.
Locate the gate driver close to the MOSFETs.
50
100
10
20
CHANNEL OSCILLATOR FREQUENCY, F
SW
(kHz)
200
500 1,000
5,000 10,000
2,000
1
2
5
10
20
50
100
200
500
1,000
R
T
(
)
FIGURE 10. RESISTANCE R
T
vs FREQUENCY
HIP6311
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